John Marvin Adams, JR
Veterinary at Academy Blvd, Colorado Springs, CO

6185620, Feb 6, 2001

Apr 3, 1998

9/054849

David M. Weber - Monument CO
Timothy E. Hoglund - Colorado Springs CO
Stephen M. Johnson - Colorado Springs CO
John M. Adams - Colorado Springs CO
Mark A. Reber - Alpharetta GA

LSI Logic Corporation

G06F 1100, G06F 946, H04Q 1104

709230

A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on ship processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order. Additionally, the context managers also determine when all frames within a sequence have been received.

6570853, May 27, 2003

Oct 4, 2000

09/679506

Stephen M. Johnson - Colorado Springs CO
Timothy E. Hoglund - Colorado Springs CO
David M. Weber - Monument CO
John M. Adams - Colorado Springs CO
Mark A. Reber - Alpharetta GA

LSI Logic Corporation - Milpitas CA

H04L 1228

370236, 370412, 3703952, 370400

A method and apparatus in a source node for transmitting data to a target node. Responsive to a request to transmit data to the target node, a determination is made as to whether a selected period of time has passed without data transmitted from the source node being received by the target node. Responsive to detecting the selected period of time has passed without data transmitted from the source node being received by the target node, a determination is made as to whether space is available in the target node to receive the data. Responsive to a determination that space is unavailable in the target node, generating an indication that the target node is blocked is generated.

5777987, Jul 7, 1998

Dec 29, 1995

8/580947

John M. Adams - Colorado Springs CO
Timothy E. Hoglund - Colorado Springs CO
Stephen M. Johnson - Colorado Springs CO
Mark A. Reber - Colorado Springs CO
David M. Weber - Monument CO

Symbios, Inc. - Fort Collins CO

H04J 300

370336

A method and associated apparatus for using a primary FIFO and one or more secondary FIFOs in parallel to simplify flow control and routing in packet communication operations wherein at least one FIFO (buffer) is associated with each of a plurality of receiving nodes or components within a receiving node. The present invention applies received packets simultaneously to a primary FIFO and to all associated secondary FIFOs in the receiver of a packet communications link. After receipt of a packet, the packet is removed from any secondary FIFOs which correspond to receiver nodes or components to which the packet was not routed. For all receiving nodes or components to which the packet was routed, if the packet was stored in each associated secondary FIFO without overflow, then the packet is also purged from the primary FIFO. If any secondary FIFO overflowed by storage of the received packet, then the packet is purged from the overflowed FIFO and the packet remains stored in the primary FIFO for further processing. Flow control signals are generated and applied to the transmitting source as required in accordance with the status of the primary FIFO.

5761424, Jun 2, 1998

Dec 29, 1995

8/580955

John M. Adams - Colorado Springs CO
Timothy E. Hoglund - Colorado Springs CO
Stephen M. Johnson - Colorado Springs CO
Mark A. Reber - Colorado Springs CO
David M. Weber - Monument CO

Symbios, Inc. - Fort Collins CO

G06F 1516

39520047

A method and associated apparatus for automating the filtration and generation of information in a packetized communication system. A filtration table includes entries used in recognizing a valid packet received at a node in a communication system. A mask field in each entry is applied to appropriate fields in the packet (e. g. the ordered set as applied to Fibre Channel communication systems) to determine the validity of the packet with regard to the receiving node. Rules in a field of each entry further qualify the recognition of a received packet (e. g. ordered set) by testing the reception of the packet against other logical rules. Action fields in each record permit definition of actions to be invoked automatically (e. g. automatic adjustment of fill transmissions in Fibre Channel applications) in response to receipt and recognition of a particular packet. The set of packets recognized by the receiving node may be modified by adding, deleting, or modifying the entries in the filtration table.

5581731, Dec 3, 1996

Oct 14, 1994

8/323420

Edward C. King - Fremont CA
John M. Adams - Colorado Springs CO

G06F 1208

395471

A method and apparatus for decreasing computer fetch time utilizes cache memory to store video data when the data is not modified by a write modifier. The video controller signals the cache controller over a control line whether the data will be modified. The data which is not modified is written to the cache memory and may be read from the cache memory when further processing is needed.

5146211, Sep 8, 1992

Aug 10, 1990

7/566014

John M. Adams - Colorado Springs CO
Brian K. Herbert - Colorado Springs CO
Stephen M. Johnson - Colorado Springs CO
Jamey L. Robbins - Colorado Springs CO

NCR Corporation - Dayton OH

G09G 100

340709

An architecture for generating a hardware cursor in the context of a bit mapped video display system operable from a frame buffer with non-displayed but addressable memory space. A segment of the non-displayed memory is loaded with cursor information controlling the generation of its outline and its color pattern. When accessed, this cursor control data is accessed from the non-displayed segment of the memory during each horizontal blank time preceding the raster scan of the video pattern data subject to cursor overlay. Location of the cursor within the video display is determined by a group of position registers which are loaded by the CPU with cursor position data during the vertical blank time. The position registers in conjunction with a group of counters coordinate the insertion of the cursor data into a byte stream of display data as it makes its way to the CRT screen. This display data is stored in the frame buffer and is transferred to the pixel output buffer.