JOHN D. OWENS, DO
Radiology at Morse Ave, Sacramento, CA
License number
California 20A9118
Category
Radiology
Type
Vascular & Interventional Radiology
Address
Address
2
2025 Morse Ave, Sacramento, CA 95825
1800 Harrison St FL 7, Oakland, CA 94612
1800 Harrison St FL 7, Oakland, CA 94612
Phone
(916) 973-5000
(510) 625-6262
(510) 625-6262
Personal information
See more information about JOHN D. OWENS at radaris.comName
Address
Phone
486 Center St APT B, Chula Vista, CA 91910
4849 Manzanita Ave APT 46, Carmichael, CA 95608
4823 Schuyler Dr, Carmichael, CA 95608
5049 Gasconade Ave, San Diego, CA 92110
5000 Dotson St, Bakersfield, CA 93308
Professional information
Dr. John D Owens, Sacramento CA - DO (Doctor of Osteopathic Medicine)
Specialties:
Diagnostic Radiology
Address:
2025 Morse Ave, Sacramento 95825
(916) 973-5000 (Phone)
(916) 973-5000 (Phone)
Languages:
English
John D Owens, Roseville CA
Specialties:
Radiologist
Address:
1600 Eureka Rd, Roseville, CA 95661
2025 Morse Ave, Sacramento, CA 95825
2025 Morse Ave, Sacramento, CA 95825
Education:
Doctor of Osteopathy
Board certifications:
American Board of Radiology Certification in Diagnostic Radiology (Radiology)
System And Method For Performing Efficient Conditional Vector Operations For Data Parallel Architectures Involving Both Input And Conditional Vector Values
US Patent:
7818539, Oct 19, 2010
Filed:
Aug 28, 2006
Appl. No.:
11/511157
Inventors:
Scott Rixner - Spring TX, US
John D. Owens - Emeryville CA, US
Ujval J. Kapasi - Santa Clara CA, US
William J. Dally - Stanford CA, US
John D. Owens - Emeryville CA, US
Ujval J. Kapasi - Santa Clara CA, US
William J. Dally - Stanford CA, US
Assignee:
The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA
The Massachusetts Institute of Technology - Cambridge MA
The Massachusetts Institute of Technology - Cambridge MA
International Classification:
G06F 15/00, G06F 15/76
US Classification:
712 20, 712 4, 712 8, 712 22, 712222
Abstract:
A processor implements conditional vector operations in which, for example, an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector. Each output vector can then be processed at full processor efficiency without cycles wasted due to branch latency. Data to be processed are divided into two groups based on whether or not they satisfy a given condition by e. g. , steering each to one of the two index vectors. Once the data have been segregated in this way, subsequent processing can be performed without conditional operations, processor cycles wasted due to branch latency, incorrect speculation or execution of unnecessary instructions due to predication. Other examples of conditional operations include combining one or more input vectors into a single output vector based on a condition vector, conditional vector switching, conditional vector combining, and conditional vector load balancing.
System And Method For Performing Efficient Conditional Vector Operations For Data Parallel Architectures Involving Both Input And Conditional Vector Values
US Patent:
7100026, Aug 29, 2006
Filed:
May 30, 2001
Appl. No.:
09/871301
Inventors:
William J. Dally - Stanford CA, US
Scott Rixner - Spring TX, US
John D. Owens - Emeryville CA, US
Ujval J. Kapasi - Santa Clara CA, US
Scott Rixner - Spring TX, US
John D. Owens - Emeryville CA, US
Ujval J. Kapasi - Santa Clara CA, US
Assignee:
The Massachusetts Institute of Technology - Cambridge MA
The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA
The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA
International Classification:
G06F 7/38
US Classification:
712222, 712 4, 712 8, 712 22, 718105
Abstract:
A processor implements conditional vector operations in which, for example, an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector. Each output vector can then be processed at full processor efficiency without cycles wasted due to branch latency. Data to be processed are divided into two groups based on whether or not they satisfy a given condition by, e. g. , steering each to one of two index vectors. Once the data have been segregated in this way, subsequent processing can be performed without conditional operations, processor cycles wasted due to branch latency, incorrect speculation or execution of unnecessary instructions due to predication. Other examples of conditional operations include combining one or more input vectors into a single output vector based on a condition vector, conditional vector switching, conditional vector combining, and conditional vector load balancing.
John Owens
Location:
Sacramento, California Area
Industry:
Higher Education