Inventors:
Jhyfang (Jeff) Hu - Cupertino CA
Assignee:
Synopsys, Inc. - Mountain View CA
International Classification:
G06F 1750
Abstract:
A system and method are described for providing state dependent power consumption characterization data for a logic cell and for minimizing characterization time in a computer controlled power estimation process. The present invention identifies power-equivalent states of the logic cell, and selects one of the power-equivalent states to be characterized. Characterization data produced is then shared among other power-equivalent states. In one embodiment of the present invention, power-equivalent states of a cell are identified by a transition pattern of the inputs and output of the logic cell. Particularly, transitions which result in similar input and output transition patterns are considered power-equivalent states. Because only a single simulation run is carried out for a plurality of power-equivalent states, simulation time is saved significantly. In another embodiment, power-equivalent states of a cell are identified according to transition patterns of circuit nodes defined by a transistor-level netlist of the logic cell.