JERRY LESLIE SMITH
Pilots in Sherman, TX

License number
Texas A1773664
Issued Date
Jul 2016
Expiration Date
Jul 2018
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
3713 Melrose St, Sherman, TX 75090

Professional information

Jerry Smith Photo 1

Backside Gettering Method Employing A Monocrystalline Germanium-Silicon Layer

US Patent:
5229306, Jul 20, 1993
Filed:
Dec 27, 1989
Appl. No.:
7/457441
Inventors:
Keith J. Lindberg - Sherman TX
Greg Gopffarth - Bonham TX
Jerry D. Smith - Sherman TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2120
US Classification:
437 12
Abstract:
A method for gettering metal atoms (28) from a subsequently contaminated silicon substrate (12) is disclosed. A smoothed or polished first surface (16) has a thin germanium silicon layer (20) deposited thereon. A silicon layer (24) is deposited onto the germanium silicon layer (20) to seal the layer (20) between the substrate (12) and the silicon layer (24). Electronic components (26) are fabricated on a second surface (14) of the silicon substrate (12) which causes the metal atoms (28) to contaminate the substrate as a result of contamination in normal processing (12). As the substrate (12) is heated during normal processing of the devices, metal atoms (28) in the substrate of a result of contamination, diffuse in the substrate (12) to the misfit dislocations at the germanium-silicon (20)/silicon interface.


Jerry Smith Photo 2

Method Of Surface Protection Of A Semiconductor Wafer During Polishing

US Patent:
5424224, Jun 13, 1995
Filed:
Jan 19, 1993
Appl. No.:
8/005713
Inventors:
Franklin L. Allen - Sherman TX
Eugene C. Davis - Sherman TX
Lawrence D. Dyer - Richardson TX
Jerry B. Medders - Van Alstyne TX
Vikki S. Simpson - Sherman TX
Jerry D. Smith - Sherman TX
Michael Cunningham - Anna TX
John B. Robbins - Sherman TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 21306
US Classification:
437 10
Abstract:
The protection to the backside of the semiconductor wafer is accomplished by applying a layer of silicon oxide or silicon nitride or other deposited material to the back surface of a semiconductor wafer to protect against particles, scratches, and etching by mild caustic solutions. The layer remains in place during all three processes, edge pre-polish, mirror edge polish, and wafer polish.