JEREMY JAMES SMITH, DDS
Dentist at Medical Pkwy, Austin, TX

5917336, Jun 29, 1999

Sep 29, 1997

8/939764

Jeremy C. Smith - Austin TX
Stephen G. Jamison - Buda TX

Motorola, Inc. - Schaumburg IL

H02H 904, H01L 2362

326 30

An electrostatic discharge (ESD) circuit (700) provides robust protection to an input/output driver circuit (10). The discharge path is provided by a bipolar transistor (202). The bipolar device is triggered by a combination of an n-type MOSFET (702), a string of diodes (200), and a biasing circuit (704). The trigger point of the MOSFET is programmable by varying the number of individual diodes in the string of diodes. The relatively high transconductance of the n-type MOSFET allows the use of a smaller ESD circuit for a given degree of protection.

6569740, May 27, 2003

Jun 13, 2000

09/593103

Jeremy C. Smith - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 21335

438279

A semiconductor device ( ) having a stacked-gate buffer ( ) wherein the stacked-gate buffer ( ) has a substrate ( ) and a top substrate region ( ) both with the same first conductivity type. The buffer ( ) also has two transistors ( ), each with a current carrying electrode and a control electrode ( ). A deep doped region ( ) lies between the first ( ) and second ( ) control electrodes where the deep doped region ( ) is another current carrying electrode for the first transistor ( ) and another current carrying electrode for the second transistor ( ) and the deep doped region ( ) has a second conductivity that is opposite the first conductivity type. A deeper doped region ( ) is also part of the stacked-gate buffer which has a second conductivity type and lies between the first ( ) and second ( ) control electrodes and is deeper than the deep doped region ( ). A method of forming the device is also provided herein.

6329692, Dec 11, 2001

Nov 30, 1998

9/201392

Jeremy C. Smith - Austin TX

Motorola Inc. - Schaumburg IL

H01L 2972

257360

A circuit (20) includes a resistor (26) and a current source (32) for raising the voltage of the source of the N-channel transistor in order to keep the base-emitter voltage of the parasitic bipolar device from forward biasing to prevent conduction in the parasitic bipolar device. In one embodiment, a relatively small resistor (26) is coupled between the source of an N-channel transistor (24) and ground. The current source (32) is used to direct some of the ESD current from a positive ESD event through the small source resistor (26) so that the source of the N-channel transistor (24) is elevated during the event, thus preventing snapback of the parasitic bipolar device.

6284616, Sep 4, 2001

Apr 27, 2000

9/560501

Jeremy C. Smith - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 21331

438364

A semiconductor device including a current source having a first node coupled to a terminal, and a second node for extracting a current in response to an electrostatic discharge (ESD) on the terminal. The semiconductor device further including a transistor having a control electrode, a first current electrode coupled to the terminal, and a second current electrode coupled to the second node of the current source, and including a resistive element coupled to a first voltage reference node and the second node of the current source. The transistor of the semiconductor device is biased by detecting a negative voltage event (such as an ESD) at a first current electrode of the transistor and biasing a second current electrode of the transistor in response to detecting the negative voltage event, wherein the biasing of the second current electrode is for preventing a forward biasing of an p-n junction associated with the transistor.

6049119, Apr 11, 2000

May 1, 1998

9/071323

Jeremy C. Smith - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 27082, H01L 2900, H01L 27102, H01L 2970

257575

A semiconductor device having a substrate with a first conductivity type. The substrate has a top substrate region that also has the first conductivity type. A first doped region, a second doped region and a third doped region are located in the top substrate region where the first and second doped regions have a second conductivity type opposite the first conductivity type while the third doped region has the first conductivity type and where the third doped region is between the first and second doped regions. A doped well region is also in the top substrate region and has the second conductivity type and has the second doped region and at least a portion of the third doped region located therein. A method of forming the device is also provided herein.

5726844, Mar 10, 1998

Apr 1, 1996

8/625858

Jeremy C. Smith - Austin TX

Motorola, Inc. - Schaumburg IL

H02H 900

361 56

A protection circuit (10) for a semiconductor-on-insulator device (20) allows an electrostatic event to occur at an input/output pad (12) without adversely affecting sensitive circuits, such as MOSFETs used in digital circuits. The protection circuit (10) allows the input/output pad (12) to be biased positively and negatively with respect to two different supply potentials and to other input/output pads on the chip. A body-tied MOSFET (14) is used in the protection circuit (10) where its drain regions (38) lie outside MOSFET's closed loop gate electrode (34).

8649134, Feb 11, 2014

Mar 11, 2010

12/722514

Jeremy C. Smith - Austin TX, US

Silicon Laboratories Inc. - Austin TX

H02H 9/00

361 56

An electrostatic discharge (ESD) protection circuit apparatus is disclosed. The apparatus includes activation circuitry coupled to a first node. The activation circuitry includes a capacitor and a selectable load. A time constant τ associated with the activation circuitry varies in accordance with the selectable load. The activation circuitry is configured to provide τ=τfor detection of an ESD event. A shunt is selectively enabled by the activation circuitry to short the first node to a second node in accordance with the detection of the ESD event. The activation circuitry is configured subsequent detection of the ESD event to provide τ=τ, wherein τ>τ.