MR. JEFFREY BROWN, MA LP
Psychologist at Lilac Dr, Minneapolis, MN

License number

Minnesota LP 2069

Professional information

Jeffrey Carl Brown, Atlanta GA - Lawyer

Address:

1201 Peachtree St NE #200, Atlanta 30361
(404) 474-1244
Sapientia Law Group
12 S 6Th St STE 1242, Minneapolis 55402
(612) 756-7108, (612) 756-7101

Licenses:

Georgia - Active Member in Good Standing 2007
Minnesota - Authorized to practice 1995

Experience:

Attorney at Sapientia Law Group - 2011-present
Adjunct Professor at William Mitchell College of Law - 2009-present
Conciliation Court Judge at Hennepin County Conciliation Court - 2000-present
Senior Associate at Merchant & Gould An Intellectual Property Law Firm - 2000-2007
Associate at Halleland, Lewis, Nilan & Johnson - 1996-2000
Associate at Popham Haik Schnobrich & Kaufman - 1995-1996

Education:

Indiana University School of Law, BloomingtonDegree JD - Juris Doctor - LawGraduated 1995
Houston Baptist UniversityDegree M.B.A. - ManagementGraduated 1986
Indiana University-BloomingtonDegree BS - Bachelor of Science - MicrobiologyGraduated 1980

Specialties:

Patent Infringement - 50%, 28 years, 12 cases
Copyright Infringement - 25%, 27 years, 6 cases
Trademark Application - 15%, 30 years, 25 cases
Patent Application - 10%, 27 years, 15 cases

Associations:

American Bar Association - Member
Hennepin County Bar Association - Member
Minnesota Association of Black Lawyers - Member
Minnesota Intellectual Property Law Association - Member
National Bar Association - Member

Description:

I am a trial attorney and practice general Intellectual Property law with an emphasis on litigation and patent prosecution. I also counsel clients on Internet...

Jeffrey Brown

Location:

Greater Minneapolis-St. Paul Area

Industry:

Law Practice

Skills:

Litigation, Commercial Litigation, Intellectual Property, Trade Secrets, Patents, Patent Litigation, Depositions, Patent Prosecution

Rf Engineer At Utc Fire &Amp; Security

Position:

RF Engineer at UTC Fire & Security

Location:

Greater Minneapolis-St. Paul Area

Industry:

Security and Investigations

Work:

UTC Fire & Security - RF Engineer GE 2006 - 2010 - RF Engr. Unisys 2000 - 2006 - Electrical Engr.

Education:

University of Wisconsin-Madison 1972 - 1978
MSEE, Electrical Engineering

Interests:

Microwave Filters

Jeffrey Brown - Minneapolis, MN

Work:

MN School of Professional Psychology
Assistant Professor Private Practice
Jeff Brown, PhD., Licensed Psychologist Minnesota Department of Corrections - Saint Paul, MN
Associate Director of Behavioral Health Services Minnesota Correctional Facility - Shakopee, MN
Director of Mental Health Services Human Services Incorporated - Oakdale, MN
DOCTORAL INTERNSHIP Minnesota Department of Corrections - Saint Paul, MN
Community Notification Assessor Pride Institute - Eden Prairie, MN
Consultant Pride Institute - Saint Paul, MN
Licensed Psychologist Program in Human Sexuality, University of Minnesota - Minneapolis, MN
Licensed Psychologist Park Place Clinic - Minneapolis, MN
Licensed Psychologist Alpha Human Services - Minneapolis, MN
Case Supervisor Family Renewal - Edina, MN
Psychotherapist Metropolitan Medical Center - Minneapolis, MN
Psychological Technician

Education:

University of Wisconsin - River Falls, WI
Masters in Education Fielding Graduate University - Santa Barbara, CA
Ph.D. in Clinical Psychology

Jeffrey Brown, Golden Valley MN - MALP

Specialties:

Psychology

Address:

1405 Lilac Dr N STE 130, Golden Valley 55422
(763) 566-0922 (Phone), (763) 503-9491 (Fax)

Languages:

English

Inter-Module Data Management Methodology For Circuit Synthesis

US Patent:

6098068, Aug 1, 2000

Filed:

Oct 16, 1997

Appl. No.:

8/951993

Inventors:

Jeffrey R. Brown - Plymouth MN

Assignee:

Micron Electronics, Inc. - Nampa ID

International Classification:

G06F 1730

US Classification:

707 10

Abstract:

One embodiment of the present invention can be characterized as a method for designing a circuit that facilitates sharing of design parameters between separately designed modules of the circuit. The method includes receiving module information, including parameters relating to design of a module of the circuit, and storing the module information in a database. The method also includes retrieving the module information from the database, and generating automatically a constraint file from the module information. In one embodiment, this constraint file includes constraints in a format suitable for use by a synthesis tool to synthesize circuitry for the module.

Apparatus For Performing A Low Latency Memory Read With Concurrent Snoop

US Patent:

6018792, Jan 25, 2000

Filed:

Jul 2, 1997

Appl. No.:

8/886908

Inventors:

Joseph Jeddeloh - Minneapolis MN
James Meyer - Shoreview MN
Jeffrey R. Brown - Plymouth MN

Assignee:

Micron Electronics, Inc. - Nampa ID

International Classification:

G06F 1200, G06F 1300

US Classification:

711146

Abstract:

A computer system has a system memory, cache memory, system controller that process memory transactions. The system controller transmits a memory request to the system memory without waiting for the cache memory to be snooped to determine whether the cache memory stores information in an address corresponding to a selected address of the system memory. The system controller may transmit a snoop request to the cache memory concurrently with or after the memory request is transmitted to the system memory. The system controller may have a control switch that uses a first pathway for the memory request and a second pathway for the snoop request so that the snoop and memory requests can be transmitted simultaneously.

Low Latency Memory Read With Concurrent Pipe Lined Snoops

US Patent:

5991855, Nov 23, 1999

Filed:

Jul 2, 1997

Appl. No.:

8/887039

Inventors:

Joseph Jeddeloh - Minneapolis MN
James Meyer - Shoreview MN
Jeffrey R. Brown - Plymouth MN

Assignee:

Micron Electronics, Inc. - Nampa ID

International Classification:

G06F 1200

US Classification:

711146

Abstract:

A method processes memory transactions in a computer system having a system memory and a cache memory. The method transmits a memory request to the system memory without waiting for the cache memory to be snooped to determine whether the cache memory stores information in an address corresponding to a selected address of the system memory. The method may transmit a snoop request to the cache memory concurrently with or after the memory request is transmitted to the system memory. The method may be implemented using a system controller having a control switch that uses a first pathway for the memory request and a second pathway for the snoop request so that the snoop and memory requests can be transmitted simultaneously.