JAMES LIN SCHAEFFER
Electrician at Rnch Rd 620, Austin, TX

7132360, Nov 7, 2006

Jun 10, 2004

10/865268

James K. Schaeffer - Austin TX, US
Darrell Roan - Austin TX, US
Dina H. Triyoso - Austin TX, US
Olubunmi O. Adetutu - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 21/4763, H01L 21/8344, H01L 21/8242, H01L 21/336

438622, 438240, 438238, 438381, 257E2129

A method for treating a semiconductor surface to form a metal-containing layer includes providing a semiconductor substrate having an exposed surface. The exposed surface of the semiconductor substrate is treated by forming one or more metals overlying the semiconductor substrate but not completely covering the exposed surface of the semiconductor substrate. The one or more metals enhance nucleation for subsequent material growth. A metal-containing layer is formed on the exposed surface of the semiconductor substrate that has been treated. The treatment of the exposed surface of the semiconductor substrate assists the metal-containing layer to coalesce. In one embodiment, treatment of the exposed surface to enhance nucleation may be performed by spin-coating, atomic layer deposition (ALD), physical layer deposition (PVD), electroplating, or electroless plating. The one or more metals used to treat the exposed surface may include any rare earth or transition metal, such as, for example, hafnium, lanthanum, etc.

7683439, Mar 23, 2010

Mar 12, 2007

11/685027

Srikanth B. Samavedam - Austin TX, US
David C. Gilmer - Austin TX, US
Mark V. Raymond - Austin TX, US
James K. Schaeffer - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 27/088

257402, 257407, 257E29255, 257E21409, 438197

A semiconductor device structure is formed over a semiconductor substrate and has a gate dielectric over the semiconductor substrate and a gate over the gate dielectric. The gate, at an interface with the gate dielectric, comprises a transition metal, carbon, and an electropositive element. The transition metal comprises one of group consisting of tantalum, titanium, hafnium, zirconium, molybdenum, and tungsten. The electropositive element comprises one of a group consisting of a Group IIA element, a Group IIIB element, and lanthanide series element.

7015153, Mar 21, 2006

Oct 20, 2004

10/969634

Dina H. Triyoso - Austin TX, US
Olubunmi O. Adetutu - Austin TX, US
David C. Gilmer - Austin TX, US
Darrell Roan - Austin TX, US
James K. Schaeffer - Austin TX, US
Philip J. Tobin - Austin TX, US
Hsing H. Tseng - Austin TX, US

Freescale Semiconductor, inc. - Austin TX

H01L 21/31

438785, 438778

A method for forming at least a portion of a semiconductor device includes providing a semiconductor substrate, flowing a first precursor gas over the substrate to form a first metal-containing layer overlying the semiconductor substrate, and after completing said step of flowing the first precursor gas, flowing a first deuterium-containing purging gas over the first metal-containing layer to incorporate deuterium into the first metal-containing layer and to also purge the first precursor gas. The method may further include flowing a second precursor gas over the first metal-containing layer to react with the first metal-containing layer to form a metal compound-containing layer, and flowing a second deuterium-containing purging gas over the metal compound-containing layer to incorporate deuterium into the metal compound-containing layer and to also purge the second precursor gas.

7648884, Jan 19, 2010

Feb 28, 2007

11/680199

Byoung W. Min - Austin TX, US
James K. Schaeffer - Austin TX, US
David C. Sing - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 21/20

438385, 438659, 257E21204

A resistive device () and a transistor () are formed. Each uses a portion of a metal layer () that is formed at the same time and thus additional process steps are avoided to remove the metal from the resistive device. The metal used in the resistive device is selectively treated to increase the resistance in the resistive device. A polycrystalline semiconductor material layer () overlies the metal layer in the resistive device. The combination of these layers provides the resistive device. In one form the metal is treated after formation of the polycrystalline semiconductor material layer. In one form the metal treatment involves an implant of a species, such as oxygen, to increase the resistivity of the metal. Various transistor structures are formed using the untreated portion of the metal layer as a control electrode.

2002017, Nov 28, 2002

May 26, 2001

09/865855

Tat Ngai - Austin TX, US
Vidya Kaushik - Austin TX, US
James Schaeffer - Austin TX, US

H01L029/94

257/408000

A semiconductor device with dual gate electrodes and its method of formation is taught. A first metal/silicon gate stack and a first gate dielectric are formed over a first doped region. The metal/gate stack comprises a metal portion over the first gate dielectric and a first gate portion over the metal portion. A silicon gate and a second gate dielectric are formed over the second doped region. In one embodiment, the first and second gate portions are P+ doped silicon germanium and the metal portion is TaSiN. In another embodiment, the first and second gate portions are N+ doped polysilicon and the metal portion is TaSiN.

2006016, Jul 27, 2006

Jan 26, 2005

11/043337

James Schaeffer - Austin TX, US
Olubunmi Adetutu - Austin TX, US

H01L 21/8238

438199000

A method for forming a semiconductor device () includes a semiconductor substrate () having a first region (), forming a gate dielectric () over the first region, forming a conductive metal oxide () over the gate dielectric, forming an oxidation resistant barrier layer () over the conductive metal oxide, and forming a capping layer over the oxidation resistant barrier layer. In one embodiment, the conductive metal oxide is IrO, MoO, and RuO, and the oxidation resistant barrier layer includes TiN.

2002013, Sep 26, 2002

Mar 20, 2001

09/811656

Vidya Kaushik - Leuven, BE
Srinivas Pietambaram - Gainesville FL, US
James Schaeffer - Austin TX, US

H01L021/3205

438/585000

A dielectric layer comprises lanthanum, aluminum and oxygen and is formed between two conductors or a conductor and substrate. In one embodiment, the dielectric layer is graded with respect to the lanthanum or aluminum. In another embodiment, an insulating layer is formed between the conductor or substrate and the dielectric layer. The dielectric layer can be formed by atomic layer chemical vapor deposition, physical vapor deposition, organometallic chemical vapor deposition or pulsed laser deposition.

2005009, May 5, 2005

Oct 29, 2003

10/696346

Srikanth Samavedam - Austin TX, US
James Schaeffer - Austin TX, US
Philip Tobin - Austin TX, US
Bikas Maiti - Austin TX, US
Joseph Mogab - Austin TX, US

H01L021/336, H01L021/8234, H01L021/4763

438197000, 438592000

In one embodiment, metal boride (MB), metal carbide (MC), metal carbo-nitrides (MCN), metal boro-carbide (MBC), metal boro-nitride (MBN) or metal boro-carbo-nitride (MBCN), wherein the metal is a transition metal (Group III-XII of the periodic chart) may be suitable as NMOS gate electrode materials. Such materials, such as TaC and LaB, can be formed to have work functions that are within approximately 4-4.3 eV, which is desirable for NMOS transistors. In addition, the amount of carbon or nitrogen can be adjusting the amount of carbon or nitrogen in the precursor to achieve a predetermined metal work function.

7655550, Feb 2, 2010

Jun 30, 2006

11/427980

James K. Schaeffer - Austin TX, US
David C. Gilmer - Austin TX, US
Mark V. Raymond - Austin TX, US
Philip J. Tobin - Austin TX, US
Srikanth B. Samavedam - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 21/4763

438592, 438591, 438257, 257310, 257407

A semiconductor device has a gate with three conductive layers over a high K gate dielectric. The first layer is substantially oxygen free. The work function is modulated to the desired work function by a second conductive layer in response to subsequent thermal processing. The second layer is a conductive oxygen-bearing metal. With sufficient thickness of the first layer, there is minimal penetration of oxygen from the second layer through the first layer to adversely impact the gate dielectric but sufficient penetration of oxygen to change the work function to a more desirable level. A third layer, which is metallic, is deposited over the second layer. A polysilicon layer is deposited over the third layer. The third layer prevents the polysilicon layer and the oxygen-bearing layer from reacting together.

6987063, Jan 17, 2006

Jun 10, 2004

10/865452

Olubunmi O. Adetutu - Austin TX, US
James K. Schaeffer - Austin TX, US
Dina H. Triyoso - Austin TX, US

Freescale Semiconductor, Inc. - Austin TX

H01L 21/44

438685, 438681, 438763, 438785, 438240, 438625, 438677, 438783, 438754, 171 93, 171 84, 171 89, 4272481, 427252, 42725531, 42725536, 427343

A metal-containing semiconductor layer having a high dielectric constant is formed with a method that avoids inclusion of contaminant elements that reduce dielectric constant of metals. The metal-containing semiconductor layer is formed overlying a substrate in a chamber. A precursor is introduced to deposit at least a portion of the metal-containing semiconductor layer. The precursor contains one or more elements that, if allowed to deposit in the metal-containing layer, would become impurity elements. A reactant gas is used to purify the metal-containing layer by removing impurity elements from the metal-containing layer which were introduced into the chamber by the precursor.