JAMES ERIC TURNER
Pilots at Champion Cir, Huntsville, AL

License number
Alabama A2377899
Issued Date
Mar 2016
Expiration Date
Mar 2018
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
1705 Champion Cir SE, Huntsville, AL 35802

Professional information

James Turner Photo 1

Deputy Manager, Spacecraft And Vehicle Systems Department At Nasa Marshall Space Flight Center

Position:
Deputy Manager, Spacecraft and Vehicle Systems Department at NASA
Location:
Huntsville, Alabama Area
Industry:
Defense & Space
Work:
NASA since May 2008 - Deputy Manager, Spacecraft and Vehicle Systems Department
Education:
Oregon State University 2011 - 2016
Bachelor's degree, Natural Resources Management and Policy
Auburn University 1987 - 1990
Master, Materials Engineering
Auburn University 1979 - 1983
Bachelor, Chemical Engineering
Interests:
Flying


James Turner Photo 2

James Turner - Huntsville, AL

Work:
Madison County Purchasing Department - Huntsville, AL
Procurement Clerk
Perez Service Inc - Madison, AL
Quality Inspector
Cincinnati Bell Communications - Cincinnati, OH
Facility Designer
Civil CAD Engineering - Miami, FL
Project Engineer
Education:
Alabama A&M University - Normal, AL
Bachelors in Mechanical Engineering Technology


James Turner Photo 3

Account Executive At American Classifieds

Position:
Account executive at American Classifieds
Location:
Huntsville, Alabama Area
Industry:
Newspapers
Work:
American Classifieds - Account executive


James Turner Photo 4

O-Ring Gasket Test Fixture

US Patent:
5000033, Mar 19, 1991
Filed:
Jun 5, 1989
Appl. No.:
7/361479
Inventors:
James E. Turner - Huntsville AL
Donald S. McCluney - Huntsville AL
Assignee:
The United States of America as represented by the Administrator of the
National Aeronautics and Space Administration - Washington DC
International Classification:
G01M 328
US Classification:
73 498
Abstract:
An apparatus for testing O-ring gaskets under a variety of temperature, pressure, and dynamic loading conditions. Specifically, this apparatus has the ability to simulate a dynamic loading condition where the sealing surface in contact with the O-ring moves both away from and axially along the face of the O-ring.


James Turner Photo 5

Peer-To-Peer Parallel Processing Graphics Accelerator

US Patent:
6046752, Apr 4, 2000
Filed:
Feb 9, 1999
Appl. No.:
9/246399
Inventors:
Dale Kirkland - Madison AL
Cynthia E. Allison - Madison AL
James Paul Turner - Huntsville AL
Joseph Clay Terry - Huntsville AL
Jeffrey S. Ford - Madison AL
Assignee:
Intergraph Corporation - Huntsville AL
International Classification:
G06F 1580
US Classification:
345505
Abstract:
A graphics accelerator includes a plurality of digital signal processors that are arranged in a self-regulating, peer-to-peer configuration. Accordingly, the processors cooperate to process, on a cyclical basis, each of a successive series of graphics requests received over a request bus. To that end, each processor includes a request bus, an input in communication with the request bus, and an output coupled to a sequencer for ordering graphics requests processed by the digital signal processors.


James Turner Photo 6

Sales At American Classifieds

Position:
sales at American Classifieds
Location:
Huntsville, Alabama Area
Industry:
Newspapers
Work:
American Classifieds - sales


James Turner Photo 7

Peer-To-Peer Parallel Processing Graphics Accelerator

US Patent:
5917502, Jun 29, 1999
Filed:
Dec 5, 1996
Appl. No.:
8/761104
Inventors:
Dale L. Kirkland - Madison AL
Cynthia E. Allison - Madison AL
James P. Turner - Huntsville AL
Joseph C. Terry - Huntsville AL
Jeffrey S. Ford - Madison AL
Assignee:
Intergraph Corporation - Huntsville AL
International Classification:
G06F 1580
US Classification:
345505
Abstract:
A graphics processing accelerator has a plurality of digital signal processors that each have an output, and an input in communication with a request bus. The digital signal processors are arranged in a peer-to-peer configuration to process, on a cyclical basis, each of a successive series of graphics requests received over a request bus. The graphics processing accelerator also may have a sequencer in communication with each digital signal processor output for ordering graphics requests processed by the digital signal processors.