JAMES ANDREW RYAN
Landscape Architect in Newtown, CT

6376911, Apr 23, 2002

Aug 23, 1995

08/518209

James Gardner Ryan - Newtown CT
Alexander Mitwalsky - Poughkeepsie NY
Katsuya Okumura - Poughkeepsie NY

International Business Machines Corporation - Armonk NY
Siemens Aktiengesellschaft - Munich
Toshiba Corporation - Kawasaki

H01L 2348

257752, 257635, 257640, 257641, 257649

A final passivation structure for a semiconductor device having conductive lines formed on a surface of the semiconductor device, comprising a planarized layer covering the surface and also covering the conductive lines, and a diffusion barrier covering the planarized layer. Alternately, the planarized layer may partially cover the conductive lines.

5534106, Jul 9, 1996

Jul 26, 1994

8/280818

William J. Cote - Poughquag NY
James G. Ryan - Newtown CT
Katsuya Okumura - Poughkeepsie NY
Hiroyuki Yano - Wappingers Falls NY

Kabushiki Kaisha Toshiba - Kawasaki

B24B 3700, H01L 2100

1566361

The invention is directed to a semi-conductor wafer processing machine including an arm having a wafer carrier disposed at one end. The wafer carrier is rotatable with the rotating motion imparted to a semi-conductor wafer held thereon. In first embodiment, the machine further includes a rotatable polishing pad having an upper surface divided into a plurality of wedge-shaped sections, including an abrasion section and a polishing section. The abrasion section has a relatively rough texture and the polishing section has a relatively fine texture as compared to each other. In an alternative embodiment, the pad includes an underlayer and surface layer. The surface layer includes two sections of differing hardness, both of which are harder than the underlayer. Alternatively, the surface layer may include one relatively hard section, and the underlayer may include two sections, one of which has the same hardness as the surface layer and the other of which is softer than the surface layer. In a further embodiment, the polishing pad has an annular shape, and a chemical processing table is disposed within the open central region of the pad.

5960318, Sep 28, 1999

Oct 27, 1995

8/549884

Matthias L. Peschke - Ottendorf-Okrilla, DE
Jeffrey Gambino - Gaylordsville CT
James Gardner Ryan - Newtown CT
Reinhard Johannes Stengl - Stadtbergen, DE

Siemens Aktiengesellschaft - Munich
International Business Machines Corporation - Armonk NY

H01L 214763

438637

A method of fabricating a self-aligned borderless contact in a semiconductor device. The semiconductor device includes a first conductor level, a patterned conductor level defining a pair of spaced apart conducting segments, and a dielectric insulating layer disposed between the first conductor level and the patterned conductor level, and over the pair of spaced apart conducting segments of the patterned conductor level. The method comprises the steps of etching a contact hole in a selected region of the dielectric insulating layer which lies above and is substantially aligned between the pair of the segments. The etching continues through the dielectric insulating layer so that a portion of the dielectric insulating layer remains between the contact hole and the first conductor level. A spacer is formed which lines the contact hole. The remaining portion of the insulating layer which extends between the contact hole and the first conductor level is then etched to extend the contact hole to the first conductor level.

6031286, Feb 29, 2000

Feb 28, 1997

8/808927

Ernest Norman Levine - Poughkeepsie NY
Michael Francis Lofaro - Milton NY
James Gardner Ryan - Newtown CT

International Business Machines Corporation - Armonk NY

H01L 2334

257714

A semiconductor device or other suitable substrate and method with single or multi layers of buried micro pipes are disclosed. This is achieved by controlling the aspect ratio of trenches as well as controlling the deposition characteristics of the material used to fill the trenches. A buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench. Another layer can be formed over the filler material and planarized. Alternatively, the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layer of buried micro pipes. Via holes may be etched to contact a micro pipe, or to inter connect micro pipes buried at different levels.

5776826, Jul 7, 1998

May 6, 1996

8/642983

Alexander Mitwalsky - Dutchess County NY
James Gardner Ryan - Newtown CT

International Business Machines Corporation - Armonk NY

H05K 306

438622

A simplified crack stop formation compatible with shallow fuse etch processes which are utilized for modern low-cost redundancy designs using upper level metal fuses. A modified last level metallization (LLM) etch according to the invention allows a high-productivity single step bondpad/fuse/crack stop etch. The stack of metal films formed at the edge of the dicing channel is readily removed with a modified LLM etch prior to dicing causing the insulator films covering the dicing channel to be physically separated from the insulators coating the electrically active chip areas. The separation prevents cracks that could propagate through the insulators of the dicing channel in to the active chip.

6204112, Mar 20, 2001

Jan 22, 1999

9/236186

Ashima Bhattacharyya Chakravarti - Hopewell Junction NY
Satya Narayan Chakravarti - Hopewell Junction NY
James G. Ryan - Newtown CT

International Business Machines Corporation - Armonk NY

H01L 218242

438243

A method for forming an integrated circuit device, and the product thereby produced, are disclosed. The disclosed method includes the steps of obtaining a substrate with a patterned gate conductor and cap insulator, forming a dielectric masking layer having at least one opening, and, using the opening in the dielectric masking layer as a mask, forming a trench capacitor which is self-aligned to the cap insulator edge. The method is particularly useful for a producing a DRAM device having a dense array region with self-aligned deep trench storage capacitors connected by buried straps.

5711858, Jan 27, 1998

Jun 30, 1995

8/496999

Richard Steven Kontra - Burlington VT
Thomas John Licata - Lagrangeville NY
James Gardner Ryan - Newtown CT
Timothy Dooling Sullivan - Underhill VT

International Business Machines Corporation - Armonk NY

C23C 1434

20419215

An improved process for depositing a conductive thin film upon an integrated circuit substrate by collimated sputtering is disclosed. The sputtered films are alloys of aluminum; a preferred alloying metal is magnesium. The sputtered films of the invention have a more uniform orientation of grains than sputtered aluminum copper silicon alloy films. Such processes are especially useful in the fabrication of integrated circuit devices having aluminum alloy wiring elements.

5712702, Jan 27, 1998

Dec 6, 1996

8/761169

Vincent James McGahay - Poughkeepsie NY
James Gardner Ryan - Newtown CT
Michael Jay Shapiro - Austin TX
Christopher Joseph Waskiewicz - Poughkeepsie NY

International Business Machines Corporation - Armonk NY

G01J 3443

356311

A marker element is included in a deposition chamber. After use of the chamber to deposit films or coatings on workpieces, the chamber is cleaned to remove materials which may contaminate future processing of workpieces in the chamber. The composition of the gas exhausted from the chamber during the cleaning process is monitored, and a characteristic of the marker element is sensed. The cleaning gas is terminated in response to the sensed characteristic of the marker element having a predetermined value, such as a peak intensity or the return to a baseline value after peaking. The present invention effectively solves the problem of overcleaning or undercleaning the chamber based upon an estimated film thickness build up.

6098788, Aug 8, 2000

Sep 9, 1997

8/926401

Nancy Anne Greco - Lagrangeville NY
Ernest Norman Levine - Poughkeepsie NY
Michael F. Lofaro - Marlboro NY
James Gardner Ryan - Newtown CT

International Business Machines Corporation - Armonk NY

B65G 3300

198657

A seamless micromechanical object is cast by forming a multilevel mold, filling the mold, and selectively removing the mold with respect to the micromechanical object. The mold can have a first level having a first opening therein, and a second level on the first level, the second level having a second opening therein, the second opening smaller than the first opening. The object may contain a controlled void, for example a micromechanical auger with a void formed therethrough to be used as a capillary to drain off fluids when the auger is in use.