MR. JAMES ALAN HENSON, LCSW
Social Work at Emkay Dr, Bend, OR

6141728, Oct 31, 2000

Jun 7, 1999

9/327293

Horia Cristian Simionescu - Foster City CA
Luan Kha Bui - Fremont CA
James A. Henson - Bend OR
Clifford M. Gold - Fremont CA

Quantum Corporation - Milpitas CA

G06F 1212

711113

A method for managing data blocks in a cache buffer defining date block segments, and for automatically transferring data into and out of the cache buffer. A cache list comprises a plurality of entries each including information identifying a corresponding cache segment, and a set of consecutive data blocks stored in the cache segment. Providing cache status for a requested set of date blocks includes traversing the cache list to locate entries identifying the starting data block in the requested set, and consecutive data blocks successively following the starting data block without interruption, and identifying as a missing data block the first data block in said succession, including said starting data block, not identified in any entry. The missing data block is used to provide status: a full hit if the missing data block is not in the requested set; a miss if the missing data block is the starting data block in the requested set, or a partial hit otherwise. In response to a write command for a new set of data, the cache list is traversed to locate all entries identifying sets of data blocks overlapping the new set.

8539406, Sep 17, 2013

Jan 31, 2011

13/018229

Michael Mahar - Amherst NH, US
Pradish Mathews - Greater Noida, IN
James Henson - Bend OR, US
Anant-Kumar Jain - Madhya Pradesh, IN

G06F 17/50, G06F 9/45

716107, 716103, 716104, 716106

Techniques and technology for formally verifying a first electronic design with a second electronic design that has been synthesized from the first electronic design, wherein the synthesis process included structural transformation operations, is provide herein. In various implementations, a first design and a second design are received. The second design having been synthesized from the first design, where no structural transformation operations were performed during synthesis of the second design. Additionally, a third design and a structural transformation guidance file are received. The third design having also been synthesized from the first design, but, where structural transformation operations were performed during synthesis of the third design. The structural transformation guidance file specifies what transformations where made during synthesis. Subsequently, a first formal verification process is implemented to verify the equivalence of the first design to the second design using conventional formal verification proofs.