HOWARD CHARLES WILSON
Pilots at Needham Ln, Austin, TX

5285352, Feb 8, 1994

Jul 15, 1992

7/913312

John R. Pastore - Leander TX
Victor K. Nomi - Round Rock TX
Howard P. Wilson - Austin TX

Motorola, Inc. - Schaumburg IL

H05K 720

361707

A pad array semiconductor device (35) includes a thermal conductor (28) integrated into a circuitized substrate (14). A semiconductor die (12) is mounted on the substrate overlying the thermal conductor to establish a thermal path away from the die. The thermal conductor may also be covered or surrounded by a metallized area (37, 39), which together may serve as a ground plane in the device. Preferably one or more terminals (26) are attached to the thermal conductor for improved thermal and electrical performance. One method of integrating the thermal conductor in the substrate is to position a metal plug into an opening 30 of the substrate. The plug is then compressed or otherwise plastically deformed to fill the opening and create a substantially planar substrate surface.

5045921, Sep 3, 1991

Dec 26, 1989

7/457002

Paul T. Lin - Austin TX
Howard P. Wilson - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 2334, H01L 2312, H01L 2314

357 74

An electronic pad array carrier IC device for mounting on a printed circuit board (PCB) or flex circuit substrate has a thin, flexible "tape" substrate having a plurality of traces. The substrate may be a polyimide or other material that can withstand relatively large lateral mechanical displacement. An integrated circuit die is mounted in proximity with or on the substrate and electrical connections between the integrated circuit chip and the traces are made by any conventional means. The substrate traces are provided at their outer ends with solder balls or pads for making connections to the PCB. A package body covers the die, which body may be optionally used to stand off the package a set distance from the PCB so that the solder balls will form the proper concave structure. Alternatively, a carrier structure may be provided around the periphery of the substrate to add rigidity during handling, testing and mounting, but which may also provide the stand-off function. The thin, flexible substrate can absorb a relatively large lateral or even vertical mechanical displacement over a rather large package area that may accommodate as few as 20 or as many 500 or more connections.

5731709, Mar 24, 1998

Jan 26, 1996

8/592256

John R. Pastore - Leander TX
Victor K. Nomi - Round Rock TX
Howard P. Wilson - Austin TX

Motorola, Inc. - Schaumburg IL

G01R 3102

324760

A ball grid array semiconductor device (30) includes a plurality of conductive balls (36) and a plurality of conductive castellations (18) around its periphery as redundant electrical connections to a semiconductor die (12). During testing of the device in a test socket (50), the conductive castellations are contacted by test contacts (54). The test contacts do not come in physical contact with the conductive balls. As a result, when testing is performed at elevated temperatures near the melting point of the conductive balls, the conductive balls are not deformed by the test contacts, thereby eliminating cosmetic-defects. Additionally, the absence of physical contact between the conductive balls and the test contacts during testing reduces the likelihood that conductive balls will inadvertently fuse to the test socket or create solder build-up on the test contacts.

5612576, Mar 18, 1997

Oct 13, 1992

7/960337

Howard P. Wilson - Austin TX
Fonzell D. J. Martin - Austin TX

Motorola - Schaumburg IL

H01L 2329

257788

A self-opening vent hole semiconductor device (10) can be manufactured to reduce the risk of popcorning during solder reflow. The device contains a semiconductor die (22) mounted on a die mounting area (15) of a substrate (12). A venting hole (16) is approximately centrally located in the die mounting area. A venting hole sealing cap (20) covers and seals the venting hole. A layer of patterned solder resist (18) adheres to a lower surface of the substrate. The venting hole sealing cap can be made from the layer of solder resist, and can be configured to be either physically isolated from the solder resist layer or physically partially connected to the solder resist layer. The venting hole sealing cap is designed to be a weakest interface within the device so that it self-opens upon an internal pressure less than a destructive pressure to the device. Solder balls (30) provide external electrical connections for the device.

5216278, Jun 1, 1993

Mar 2, 1992

7/841765

Paul T. Lin - Austin TX
Michael B. McShane - Austin TX
Howard P. Wilson - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 2348, H01L 2944, H01L 2952, H01L 2960

257688

A semiconductor device (10) having first and second wiring layers (30, 33) on opposite surfaces of a carrier substrate (12) interconnected through vias (32) formed in the carrier substrate (12) electrically coupling an electronic component (18) to a mounting substrate through compliant solder balls (26) displaced away from vias (32), the semiconductor device (10) characterized by a standard size carrier substrate (12) having high performance electrical package interconnections (24) and good heat dissipation. Improved electrical performance is obtained by providing independent wiring layers (30, 33) each having a lead trace layout specifically designed for a particular electronic component (18) and a particular board connection requirement while using a standard size package outline. Assembly costs are reduced by providing a plastic package mold (36) over a standard size carrier substrate (12) capable of supporting a variety of different electronic components (18) themselves having varying dimensions.

5006922, Apr 9, 1991

Feb 14, 1990

7/480386

Michael B. McShane - Austin TX
Paul T. Lin - Austin TX
Howard P. Wilson - Austin TX

Motorola, Inc. - Schaumburg IL

H01L 2350, H01L 2304

357 74

An improved packaged semiconductor device is provided having an electronic component, such as an integrated circuit, enclosed within a single layer ceramic PGA package. A cap, of substantially the same areal dimension as the base, is sealed to the base forming a cavity in which the integrated circuit is mounted. Input/output pins are attached to through-holes in the base and extend through the base and are exposed by holes in the cap aligned to the through-holes in the base. Extensive glass sealing of the cap to the base, made possible by the substantially co-extensive nature of the cap with respect to the base, provides a sturdy highly reliable seal making the packaged semiconductor device better able to withstand mechanical stress.