Inventors:
Chor Yin Chia - San Jose CA, US
Hong Joong Kim - San Jose CA, US
Assignee:
INTERSIL AMERICAS INC. - Milpitas CA
International Classification:
G06F 3/038, H03L 5/00
Abstract:
In an embodiment, a voltage level shifter circuit includes a first terminal configured to be connected to a high voltage supply rail (Vs+), a second terminal configured to be connected to a low voltage supply rail (Vs−), and an output voltage (V) terminal. The voltage level shifter can also include a compensation voltage (V) node. Additionally, the voltage level shifter includes a plurality of switches configurable in a plurality of configurations, and control circuitry configured to control the switches so that in at least one of the configurations a load connected to the output voltage (V) terminal does not draw any power from the low voltage supply rail (Vs−) and the high voltage supply rail (Vs+). The load can be, e.g., a gate drive circuit of a display panel, such as a thin film transistor-liquid crystal display (TFT-LCD) panel, but is not limited thereto.