GEORGE RICHARD TAYLOR
Pilots at Hiawatha Bch Dr, Anoka, MN
License number
Minnesota A1881343
Issued Date
May 2015
Expiration Date
May 2016
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
17464 Hiawatha Beach Dr NE, Anoka, MN 55304
Professional information
System And Method For Optically Interconnecting Memory Devices
US Patent:
7382639, Jun 3, 2008
Filed:
Oct 2, 2006
Appl. No.:
11/542337
Inventors:
George R. Taylor - Ham Lake MN, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G11C 5/06
US Classification:
365 63, 365 64, 365215, 365234
Abstract:
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.
System And Method For Optically Interconnecting Memory Devices
US Patent:
7289347, Oct 30, 2007
Filed:
Feb 18, 2005
Appl. No.:
11/062075
Inventors:
George R. Taylor - Ham Lake MN, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G11C 5/06
US Classification:
365 64, 365 63, 365215, 365234, 365109, 359107
Abstract:
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.
System And Method For Optically Interconnecting Memory Devices
US Patent:
7200024, Apr 3, 2007
Filed:
Aug 2, 2002
Appl. No.:
10/211036
Inventors:
George R. Taylor - Ham Lake MN, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G11C 5/06, G11C 13/04
US Classification:
365 64, 365 63, 365215, 365234, 365109, 359107
Abstract:
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.
System And Method For Optically Interconnecting Memory Devices
US Patent:
7411807, Aug 12, 2008
Filed:
Oct 2, 2006
Appl. No.:
11/542338
Inventors:
George R. Taylor - Ham Lake MN, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G11C 5/06
US Classification:
365 64, 365 63, 365215, 365234, 365109, 359107
Abstract:
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable to receive and convert optical address and control signals, respectively, into corresponding electrical address signals applied to the address decoder and control signals applied to the control logic. A read/write circuit on the substrate is coupled to a data converter formed in the substrate. The data converter is operable to receive and convert optical write data signals into corresponding electrical data signals to be applied to the read/write circuit and to receive and convert electrical read data signals into corresponding optical read data signals.