FREDERICK G CARTER
Cosmetology in Lawrence, MA

License number
Massachusetts 2111645
Expiration Date
Dec 31, 1982
Type
Cosmetologist Type 2
Address
Address
Lawrence, MA 01841

Professional information

Frederick Carter Photo 1

Method Of Multicasting Data Through A Communications Switch

US Patent:
6636511, Oct 21, 2003
Filed:
Nov 21, 2000
Appl. No.:
09/717472
Inventors:
Subhash C. Roy - Lexington MA
Michael M. Renault - Medway MA
Frederick R. Carter - Lawrence MA
David K. Toebes - Andover MA
Rajen S. Ramchandani - Clinton MA
Daniel C. Upp - Southbury CT
Assignee:
Transwitch Corporation - Shelton CT
International Classification:
H04L 1228
US Classification:
370390, 370388, 370401
Abstract:
A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13. 89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload.


Frederick Carter Photo 2

Method For Switching Atm, Tdm, And Packet Data Through A Single Communications Switch

US Patent:
6636515, Oct 21, 2003
Filed:
Nov 21, 2000
Appl. No.:
09/717999
Inventors:
Subhash C. Roy - Lexington MA
Santanu Das - Monroe CT
Daniel C. Upp - Southbury CT
William B. Lipp - New Haven CT
Jitender K. Vij - Trumbull CT
Michael M. Renault - Medway MA
Frederick R. Carter - Lawrence MA
Rajen S. Ramchandani - Clinton MA
Assignee:
Transwitch Corporation - Shelton CT
International Classification:
H04L 1228
US Classification:
3703951, 370466, 370401
Abstract:
A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13. 89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload.


Frederick Carter Photo 3

Method And Apparatus For Arbitrating Bandwidth In A Communications Switch

US Patent:
7061935, Jun 13, 2006
Filed:
Nov 21, 2000
Appl. No.:
09/717147
Inventors:
Subhash C. Roy - Lexington MA, US
Michael M. Renault - Medway MA, US
Frederick R. Carter - Lawrence MA, US
David K. Toebes - Andover MA, US
Rajen S. Ramchandani - Clinton MA, US
Assignee:
Transwitch Corporation - Shelton CT
International Classification:
H04J 3/16, H04J 3/22
US Classification:
370468, 370388, 3703951
Abstract:
A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13. 89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload.