FRANK VICTOR TAYLOR IV
Pilots at Pinehurst Ct, Lewisville, TX
License number
Texas A5199576
Issued Date
Jul 2014
Expiration Date
Jul 2015
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
2407 Pinehurst Ct, Lewisville, TX 75077
Professional information
Method And Apparatus For 24-Bit Memory Addressing In Microcontrollers
US Patent:
2002015, Oct 24, 2002
Filed:
Aug 7, 2001
Appl. No.:
09/924249
Inventors:
Edward Ma - Plano TX, US
Frank Taylor - Highland Village TX, US
Stephen Grider - Argyle TX, US
Wendell Little - Corinth TX, US
Frank Taylor - Highland Village TX, US
Stephen Grider - Argyle TX, US
Wendell Little - Corinth TX, US
International Classification:
G06F012/00
US Classification:
711/219000, 711/213000
Abstract:
The present invention provides an 8-bit microcontroller capable of supporting expanded addressing capability in one of three address modes. The microcontroller operates in either the traditional 16-bit address mode, a 24-bit paged address mode or in a 24-bit contiguous address mode based on the setting of a new Address Control (ACON) Special Function Register (SFR). The 24-bit paged address mode is binary code compliant with traditional compilers for the standard 16-bit address range, but allows for up to 16M bytes of program memory and 16M bytes of data memory to be supported via a new Address Page (AP) SFR, a new first extended data pointer (DPX) SFR and a new second extended data pointer (DPX) register. The 24-bit contiguous mode requires a 24-bit address compiler that supports contiguous program flow over the entire 24-bit address range via the addition of an operand and/or cycles to either basic instructions.
Facilitating Automatic Incrementing And/Or Decrementing Of Data Pointers In A Microcontroller
US Patent:
2002013, Sep 19, 2002
Filed:
Aug 7, 2001
Appl. No.:
09/924242
Inventors:
Wendell Little - , US
Edward Ma - Plano TX, US
Frank Taylor - Highland Village TX, US
Ann Little - Corinth TX, US
Edward Ma - Plano TX, US
Frank Taylor - Highland Village TX, US
Ann Little - Corinth TX, US
International Classification:
G06F015/00, G06F015/76
US Classification:
712/010000
Abstract:
An 8051-based style microcontroller system which is capable of using multiple data pointers while remaining compatible with 8-bit 8051 instruction-set compatible microcontrollers. A hardware feature for selecting one of two active data pointers is incorporated into the design. The design includes circuitry for incrementing/decrementing the active data pointer. Furthermore, there is included circuitry for enabling automatic incrementing/decrementing of the active data pointer.
Memory Exchange
US Patent:
2002019, Dec 19, 2002
Filed:
Aug 7, 2001
Appl. No.:
09/924239
Inventors:
Edward Ma - Plano TX, US
Stephen Grider - Argyle TX, US
Frank Taylor - Highland Village TX, US
Joseph Gorski - Plano TX, US
Andrew Jones - Richardson TX, US
Wendell Little - Denton TX, US
Ann Little - Corinth TX, US
Stephen Grider - Argyle TX, US
Frank Taylor - Highland Village TX, US
Joseph Gorski - Plano TX, US
Andrew Jones - Richardson TX, US
Wendell Little - Denton TX, US
Ann Little - Corinth TX, US
Assignee:
Dallas Semiconductor Corporation
International Classification:
G06F012/00
US Classification:
714/001000, 711/202000, 711/117000, 713/001000
Abstract:
Methods, systems, and arrangements enable efficient reprogramming of a memory block of a microcontroller. Two blocks of memory each have a different logical location with respect to a processor of the microcontroller. The first memory may store vector information to be executed by the processor. The second memory may store data information. The logical location of each memory block is dependent on the value of a pre-determined bit in a specified register. When a user wishes to reprogram the contents of the first memory, the user enters new code into the second memory. Upon completion, the value of the pre-determined bit is changed, and the logical locations of the first and second memories are interchanged. In effect, the newly entered code from the second memory is accessed as if it were in the first memory (e.g., from an addressing perspective), and the processor may execute the new program (e.g., after the processor undergoes a system reset).