Education:
University of Southern California - Los Angeles, CA
Master of Science in Electrical Engineering
Skills:
Language: Verilog, System Verilog, Perl, Python, C/C++ Tools: Modelsim, Cadence Virtuoso, Cadence NCSim, NCVerilog, Synopsys DC, TetraMax, Xilinx ISE13.2, FPGA, Cadence SOC Encounter, Synopsys PrimeTime, Vision C, Linux Terminal