ERIC RUSSELL PETERSON
Pilots at Rosita Rd, Camarillo, CA

License number
California A2418336
Issued Date
Feb 2016
Expiration Date
Feb 2018
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
10501 Rosita Rd, Camarillo, CA 93012

Personal information

See more information about ERIC RUSSELL PETERSON at radaris.com
Name
Address
Phone
Eric Peterson, age 62
50 E Middlefield Rd APT 24, Mountain View, CA 94043
Eric Peterson
5104 Shenandoah St, Ventura, CA 93003
Eric Peterson, age 70
505 Borden Rd, San Marcos, CA 92069
(213) 252-8250
Eric Peterson, age 61
47 Circle Ave, Mill Valley, CA 94941
(415) 608-9195
Eric Peterson
4790 Skycrest Dr, Santa Rosa, CA 95405
(707) 544-7350

Professional information

See more information about ERIC RUSSELL PETERSON at trustoria.com
Eric Peterson Photo 1
Eric Peterson - Camarillo, CA

Eric Peterson - Camarillo, CA

Work:
RAYTHEON - Goleta, CA
Principal Technical Support Engineer
RAYTHEON - El Segundo, CA
Project Management
TRIKON TECHNOLOGIES - Fountain Valley, CA
North American Field Service Manager
ROCKWELL SCIENCE CENTER
Member Technical Staff
ROCKWELL SCIENCE CENTER - Thousand Oaks, CA
Process development
ROCKWELL SCIENCE CENTER
Sr. Research Specialist
ROCKWELL SCIENCE CENTER
Research Specialist
ROCKWELL SCIENCE CENTER
Sr. Technical Specialist
Education:
California Lutheran University - Thousand Oaks, CA
B.S. in Computer Information Systems
Skills:
Scheduling and Planning Vendor Negotiations Project Management Service Contract Negotiations Processes and Procedures Quality Audits (ISO 9000, Six Sigma) Customer Service Management of geographically diverse teams Microsoft Office Visio, Project


Eric Peterson Photo 2
Router And Methods Using Network Addresses For Virtualization

Router And Methods Using Network Addresses For Virtualization

US Patent:
2007018, Aug 9, 2007
Filed:
Mar 30, 2007
Appl. No.:
11/694805
Inventors:
William Terrell - Thousand Oaks CA, US
Tracy Edmonds - Morgan Hills CA, US
Wayland Jeong - Agoura Hills CA, US
Eric Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
International Classification:
H04L 12/56
US Classification:
370389000
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 3
Router And Methods For Distributed Virtualization

Router And Methods For Distributed Virtualization

US Patent:
7292567, Nov 6, 2007
Filed:
Oct 31, 2002
Appl. No.:
10/285226
Inventors:
William C. Terrell - Thousand Oaks CA, US
Tracy Edmonds - Camarillo CA, US
Wayland Joeng - Agoura Hills CA, US
Eric Russell Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
Assignee:
QLogic Corporation - Aliso Viejo CA
International Classification:
H04L 12/50
US Classification:
370363
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 4
Router And Methods Using In-Band Link Between Managing Processor And Routing Processor

Router And Methods Using In-Band Link Between Managing Processor And Routing Processor

US Patent:
2003019, Oct 9, 2003
Filed:
Oct 30, 2002
Appl. No.:
10/284655
Inventors:
William Terrell - Thousand Oaks CA, US
Tracy Edmonds - Morgan Hills CA, US
Wayland Jeong - Agoura Hills CA, US
Eric Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
International Classification:
G06F015/173
US Classification:
709/244000
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 5
Router With Routing Processors And Methods For Virtualization

Router With Routing Processors And Methods For Virtualization

US Patent:
2008000, Jan 10, 2008
Filed:
Sep 24, 2007
Appl. No.:
11/859956
Inventors:
William Terrell - Thousand Oaks CA, US
Tracy Edmonds - Morgan Hills CA, US
Wayland Jeong - Agoura Hills CA, US
Eric Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
International Classification:
H04L 12/28
US Classification:
370401000
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a viral entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 6
Router And Methods Using Network Addresses For Virtualization

Router And Methods Using Network Addresses For Virtualization

US Patent:
7200144, Apr 3, 2007
Filed:
Oct 18, 2001
Appl. No.:
10/120266
Inventors:
William C. Terrell - Thousand Oaks CA, US
Tracy Edmonds - Camarillo CA, US
Wayland Joeng - Agoura Hills CA, US
Eric Russell Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
Assignee:
Qlogic, Corp. - Aliso Viejo CA
International Classification:
H04L 12/28
US Classification:
370389, 370392
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 7
Router With Routing Processors And Methods For Virtualization

Router With Routing Processors And Methods For Virtualization

US Patent:
7362702, Apr 22, 2008
Filed:
Oct 29, 2002
Appl. No.:
10/284273
Inventors:
William C. Terrell - Thousand Oaks CA, US
Tracy Edmonds - Camarillo CA, US
Wayland Joeng - Agoura Hills CA, US
Eric Russell Peterson - Camarillo CA, US
Jean Kodama - Cerritos CA, US
Harun Muliadi - Thousand Oaks CA, US
Norman Chan - Diamond Bar CA, US
Rexford Hill - San Diego CA, US
Michael Nishimura - San Diego CA, US
Stephen How - San Diego CA, US
Assignee:
QLOGIC, Corporation - Aliso Viejo CA
International Classification:
H04J 1/16, H04L 12/66, H04L 12/56
US Classification:
370230, 370235, 370356, 370389, 370392, 370400, 370412
Abstract:
A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.


Eric Peterson Photo 8
Message Transfer System

Message Transfer System

US Patent:
2004010, May 27, 2004
Filed:
May 30, 2003
Appl. No.:
10/452782
Inventors:
Andrew Lines - Calabasas CA, US
Craig Stoops - Simi Valley CA, US
Eric Peterson - Camarillo CA, US
Alain Gravel - Thousands Oaks CA, US
Assignee:
Fulcrum Microsystems, Inc. - Calabasas CA
International Classification:
H04L001/00
US Classification:
370/229000
Abstract:
A message unit for transmitting messages in a data processing system characterized by an execution cycle is described. The message unit includes a message array and message transfer circuitry. The message transfer circuitry is operable to facilitate transfer of a message stored in a first portion of the message array in response to a first message transfer request. The message transfer circuitry is further operable to store up to one additional message transfer request per execution cycle while facilitating transfer of the message, and to maintain strict ordering between overlapping requests.