EDWARD J DUFFY
Broker in Arlington, MA

License number
Massachusetts 51283
Issued Date
Mar 1, 1966
Expiration Date
May 13, 1976
Type
Broker
Address
Address
Arlington, MA 02474

Professional information

Edward Duffy Photo 1

Reconfigurable, Virtual Processing System, Cluster, Network And Method

US Patent:
7231430, Jun 12, 2007
Filed:
Jan 4, 2002
Appl. No.:
10/038353
Inventors:
Vern Brownell - Chatham MA, US
Pete Manca - Sterling MA, US
Ben Sprachman - Hopkinton MA, US
Paul Curtis - Sudbury MA, US
Ewan Milne - Stow MA, US
Max Smith - Natick MA, US
Alan Greenspan - Northboro MA, US
Scott Geng - Westboro MA, US
Dan Busby - Sterling MA, US
Edward Duffy - Arlington MA, US
Peter Schulter - Hampstead NH, US
Assignee:
Egenera, Inc. - Marlboro MA
International Classification:
G06F 15/16, G06F 15/173, G06F 15/167, H04L 12/56
US Classification:
709218, 709212, 709205, 709244, 37039553
Abstract:
A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.


Edward Duffy Photo 2

Reconfigurable, Virtual Processing System, Cluster, Network And Method

US Patent:
2007023, Oct 4, 2007
Filed:
Jun 6, 2007
Appl. No.:
11/759078
Inventors:
Vern BROWNELL - Chatham MA, US
Pete MANCA - Sterling MA, US
Ben SPRACHMAN - Hopkinton MA, US
Paul CURTIS - Sudbury MA, US
Ewan MILNE - Stow MA, US
Max SMITH - Natick MA, US
Alan GREENSPAN - Northboro MA, US
Scott GENG - Westboro MA, US
Dan BUSBY - Sterling MA, US
Edward DUFFY - Arlington MA, US
Peter SCHULTER - Hampstead NH, US
International Classification:
G06F 15/177
US Classification:
709220000
Abstract:
A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.


Edward Duffy Photo 3

Service Clusters And Method In A Processing System With Failover Capability

US Patent:
6971044, Nov 29, 2005
Filed:
Jan 4, 2002
Appl. No.:
10/038355
Inventors:
Scott Geng - Westboro MA, US
Pete Manca - Sterling MA, US
Paul Curtis - Sudbury MA, US
Ewan Milne - Stow MA, US
Max Smith - Natick MA, US
Alan Greenspan - Northboro MA, US
Edward Duffy - Arlington MA, US
Peter Schulter - Hampstead NH, US
Assignee:
Egenera, Inc. - Marlborough MA
International Classification:
G06F011/00
US Classification:
714 11, 709226
Abstract:
A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network has a corresponding virtual MAC address and the virtual local area network provides communication among a set of computer processors but excludes the processors from the plurality not in the defined set. A virtual storage space is defined and established with a defined correspondence to the address space of the storage network. In response to a failure by a computer processor, a computer processor from the plurality is allocated to replace the failed processor. The MAC address of the failed processor is assigned to the processor that replaces the failed processor. The virtual storage space and defined correspondence of the failed processor is assigned to the processor that replaces the failed processor.


Edward Duffy Photo 4

Reconfigurable, Virtual Processing System, Cluster, Network And Method

US Patent:
2007023, Oct 4, 2007
Filed:
Jun 6, 2007
Appl. No.:
11/759077
Inventors:
Vern BROWNELL - Chatham MA, US
Pete MANCA - Sterling MA, US
Ben SPRACHMAN - Hopkinton MA, US
Paul CURTIS - Sudbury MA, US
Ewan MILNE - Stow MA, US
Max SMITH - Natick MA, US
Alan GREENSPAN - Northboro MA, US
Scott GENG - Westboro MA, US
Dan BUSBY - Sterling MA, US
Edward DUFFY - Arlington MA, US
Peter SCHULTER - Hampstead NH, US
International Classification:
G06F 15/16
US Classification:
709218000
Abstract:
A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.


Edward Duffy Photo 5

Reconfigurable, Virtual Processing System, Cluster, Network And Method

US Patent:
2007023, Oct 4, 2007
Filed:
Jun 6, 2007
Appl. No.:
11/759076
Inventors:
Vern BROWNELL - Chatham MA, US
Peter MANCA - Sterling MA, US
Ben SPRACHMAN - Hopkinton MA, US
Paul CURTIS - Sudbury MA, US
Ewan MILNE - Stow MA, US
Max SMITH - Natick MA, US
Alan GREENSPAN - Northborough MA, US
Scott GENG - Westboro MA, US
Dan BUSBY - Sterling MA, US
Edward DUFFY - Arlington MA, US
Peter SCHULTER - Hampstead NH, US
International Classification:
G06F 15/16
US Classification:
709218000
Abstract:
A platform and method of deploying virtual processing areas networks are described. A plurality of computer processors are connected to an internal communication network. At least one control node is in communication with an external communication network and an external storage network has an external storage address space. The at least one control node is connected to the internal network and thereby is in communication with the plurality of computer processors. Configuration logic defines and establishes a virtual processing area network having a corresponding set of computer processors from the plurality of processors, a virtual local area communication network providing communication among the set of computer processors, and a virtual storage space with a defined correspondence to the address space of the storage network.


Edward Duffy Photo 6

Service Clusters And Method In A Processing System With Failover Capability

US Patent:
7305581, Dec 4, 2007
Filed:
Oct 13, 2005
Appl. No.:
11/250154
Inventors:
Scott Geng - Westboro MA, US
Pete Manca - Sterling MA, US
Paul Curtis - Sudbury MA, US
Ewan Milne - Stow MA, US
Max Smith - Natick MA, US
Alan Greenspan - Northboro MA, US
Edward Duffy - Arlington MA, US
Peter Schulter - Hampstead NH, US
Assignee:
Egenera, Inc. - Marlborough MA
International Classification:
G06F 11/00
US Classification:
714 11
Abstract:
A platform for and method of computer processing to support processor failover are disclosed. A plurality of computer processors are connected to an internal communication network. A virtual local area communication network over the internal network is defined and established. Each computer processor in the virtual local area communication network has a corresponding virtual MAC address and the virtual local area network provides communication among a set of computer processors but excludes the processors from the plurality not in the defined set. A virtual storage space is defined and established with a defined correspondence to the address space of the storage network. In response to a failure by a computer processor, a computer processor from the plurality is allocated to replace the failed processor. The MAC address of the failed processor is assigned to the processor that replaces the failed processor. The virtual storage space and defined correspondence of the failed processor is assigned to the processor that replaces the failed processor.


Edward Duffy Photo 7

Address Resolution Protocol System And Method In A Virtual Network

US Patent:
7174390, Feb 6, 2007
Filed:
Jan 4, 2002
Appl. No.:
10/038354
Inventors:
Peter Schulter - Hampstead NH, US
Scott Geng - Westboro MA, US
Pete Manca - Sterling MA, US
Paul Curtis - Sudbury MA, US
Ewan Milne - Stow MA, US
Max Smith - Natick MA, US
Alan Greenspan - Northboro MA, US
Edward Duffy - Arlington MA, US
Assignee:
Egenera, Inc. - Marlborough MA
International Classification:
G06F 15/16
US Classification:
709245, 709238
Abstract:
A virtual networking system and method are disclosed. Switched Ethernet local area network semantics are provided over an underlying point to point mesh. Computer processor nodes may directly communicate via virtual interfaces over a switch fabric or they may communicate via an ethernet switch emulation. Address resolution protocol logic helps associate IP addresses with virtual interfaces while allowing computer processors to reply to ARP requests with virtual MAC addresses.


Edward Duffy Photo 8

Distributed Multicast System And Method In A Network

US Patent:
2006011, Jun 1, 2006
Filed:
Nov 29, 2004
Appl. No.:
10/999118
Inventors:
Edward Duffy - Arlington MA, US
Scott Geng - Westborough MA, US
Hai Huang - Nashua NH, US
Hua Qin - Marlboro MA, US
Assignee:
Egenera, Inc. - Marlborough MA
International Classification:
H04L 12/28
US Classification:
370390000, 370432000
Abstract:
The invention provides multicast communication using distributed topologies in a network. The control nodes in the network build a distributed topology of processor nodes for providing multicast packet distribution. Multiple processor nodes in the network participate in the decisions regarding the forwarding of multicast packets as opposed to multicast communications being centralized in the control nodes.


Edward Duffy Photo 9

Virtual Networking System And Method In A Processing System

US Patent:
2003013, Jul 10, 2003
Filed:
Jan 4, 2002
Appl. No.:
10/037191
Inventors:
Peter Schulter - Hampstead NH, US
Scott Geng - Westboro MA, US
Pete Manca - Sterling MA, US
Paul Curtis - Sudbury MA, US
Ewan Milne - Stow MA, US
Max Smith - Natick MA, US
Alan Greenspan - Northboro MA, US
Edward Duffy - Arlington MA, US
International Classification:
G06F009/455
US Classification:
703/023000
Abstract:
A virtual networking system and method are disclosed. Switched Ethernet local area network semantics are provided over an underlying point to point mesh. Computer processor nodes may directly communicate via virtual interfaces over a switch fabric or they may communicate via an ethernet switch emulation. Address resolution protocol logic helps associate IP addresses with virtual interfaces while allowing computer processors to reply to ARP requests with virtual MAC addresses.