EDMOND ROWAN WARD
Pilots at Eaton Ln, Los Gatos, CA

License number
California A1998337
Issued Date
Jul 2015
Expiration Date
Jul 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
17324 Eaton Ln, Los Gatos, CA 95030

Personal information

See more information about EDMOND ROWAN WARD at radaris.com
Name
Address
Phone
Edmond Ward
17324 Eaton Ln, Monte Sereno, CA 95030
Edmond Ward
17324 Eaton Ln, Los Gatos, CA 95030
Edmond Ward
2801 Rimpau Blvd, Los Angeles, CA 90016
Edmond Ward
1000 4Th St, San Rafael, CA 94901
Edmond Ward
4 Orchard Way, Greenbrae, CA 94904

Professional information

See more information about EDMOND ROWAN WARD at trustoria.com
Edmond Ward Photo 1
Cross Point Memory Array Using Multiple Modes Of Operation

Cross Point Memory Array Using Multiple Modes Of Operation

US Patent:
6834008, Dec 21, 2004
Filed:
Dec 26, 2002
Appl. No.:
10/330153
Inventors:
Darrell Rinerson - Cupertino CA
Christophe J. Chevallier - Palo Alto CA
Steven W. Longcor - Mountain View CA
Edmond R. Ward - Monte Sereno CA
Wayne Kinney - Emmett ID
Steve Kuo-Ren Hsia - San Jose CA
Assignee:
Unity Semiconductor Corporation - Sunnyvale CA
International Classification:
G11C 1100
US Classification:
365158, 365173, 365184
Abstract:
Cross point memory array using multiple modes of operation. The invention is a cross point memory array that uses a read mode to determine the resistive state of a memory plug, a first write mode to cause the memory plug to change from a first resistive state to a second resistive state, and a second write mode to cause the memory plug to change from the second resistive state back to the first resistive state.


Edmond Ward Photo 2
Cross Point Memory Array With Memory Plugs Exhibiting A Characteristic Hysteresis

Cross Point Memory Array With Memory Plugs Exhibiting A Characteristic Hysteresis

US Patent:
6850429, Feb 1, 2005
Filed:
Dec 26, 2002
Appl. No.:
10/330900
Inventors:
Darrell Rinerson - Cupertino CA, US
Steven W. Longcor - Mountain View CA, US
Steve Kuo-Ren Hsia - San Jose CA, US
Wayne Kinney - Emmett ID, US
Edmond R. Ward - Monte Sereno CA, US
Christophe J. Chevallier - Palo Alto CA, US
International Classification:
G11C 1100
US Classification:
365158, 365157, 36518524, 365 46, 365 48
Abstract:
Providing a cross point, memory array with memory plugs exhibiting a characteristic hysteresis. The memory plugs exhibit a hysteresis that, in the low resistive state, the first write threshold voltage is the point above which any voltages applied across the memory plug have substantially no effect on the resistive state and below which a voltage pulse will alter the resistance of the memory plug. Similarly, in the high resistive state, the second write threshold voltage is the point below which any voltages applied across the memory plug have substantially no effect on the resistive state and above which a voltage pulse will alter the resistance of the memory plug. The read voltages applied to the memory plug are typically above the first write threshold voltage and lower than the second write threshold voltage.


Edmond Ward Photo 3
Method For Fabricating Multi-Resistive State Memory Devices

Method For Fabricating Multi-Resistive State Memory Devices

US Patent:
8062942, Nov 22, 2011
Filed:
Jun 30, 2008
Appl. No.:
12/215958
Inventors:
Darrell Rinerson - Cupertino CA, US
Wayne Kinney - Emmett ID, US
Edmond Ward - Monte Sereno CA, US
Steve Kuo-Ren Hsia - San Jose CA, US
Steven W. Longcor - Mountain View CA, US
Christophe J. Chevallier - Palo Alto CA, US
Philip Swab - Santa Rosa CA, US
International Classification:
H01L 21/00
US Classification:
438238, 438382, 257E21004
Abstract:
A treated conductive element is provided. A conductive element can be treated by depositing either a reactive metal or a very thin layer of material on the conductive element. The reactive metal (or very thin layer of material) would typically be sandwiched between the conductive element and an electrode. The structure additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays.


Edmond Ward Photo 4
Conductive Memory Stack With Non-Uniform Width

Conductive Memory Stack With Non-Uniform Width

US Patent:
2005010, May 12, 2005
Filed:
Nov 10, 2003
Appl. No.:
10/605963
Inventors:
Darrell Rinerson - Cupertino CA, US
Steve Hsia - San Jose CA, US
Steven Longcor - Mountain View CA, US
Wayne Kinney - Emmett ID, US
Edmond Ward - Monte Sereno CA, US
Christophe Chevallier - Palo Alto CA, US
Assignee:
UNITY SEMICONDUCTOR INC. - Sunnyvale CA
International Classification:
H01L021/336
US Classification:
438257000
Abstract:
A conductive memory stack is provided. The memory stack includes a bottom electrode, a top electrode and a multi-resistive state element that is sandwiched between the electrodes. The bottom electrode can be described as having a top face with a first surface area, the top electrode has a bottom face with a second surface area and the multi-resistive state element has a bottom face with a third surface area and a top face with a fourth surface area. The multi-resistive state element's bottom face is in contact with the bottom electrode's top face and the multi-resistive state element's top face is in contact with the top electrode's bottom face. Furthermore, the fourth surface area is not equal to the second surface area.


Edmond Ward Photo 5
Method Of Uniformly Coating A Substrate

Method Of Uniformly Coating A Substrate

US Patent:
6238735, May 29, 2001
Filed:
Sep 8, 1999
Appl. No.:
9/391964
Inventors:
Robert P. Mandal - Saratoga CA
James C. Grambow - San Jose CA
Ted C. Dettes - Newark CA
Donald R. Sauer - San Jose CA
Emir Gurer - Sunnyvale CA
Edmond R. Ward - Monte Sereno CA
Assignee:
Silicon Valley Group, Inc. - San Jose CA
International Classification:
B05D 312
US Classification:
427240
Abstract:
A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.


Edmond Ward Photo 6
Cross Point Array Using Distinct Voltages

Cross Point Array Using Distinct Voltages

US Patent:
7020012, Mar 28, 2006
Filed:
Dec 13, 2004
Appl. No.:
11/012059
Inventors:
Darrell Rinerson - Cupertino CA, US
Steven W. Longcor - Mountain View CA, US
Christophe J. Chevallier - Palo Alto CA, US
Edmond R. Ward - Monte Sereno CA, US
International Classification:
G11C 11/02
US Classification:
365158, 365 69
Abstract:
Cross point memory array using distinct voltages. The invention is a cross point memory array that applies a first select voltage on one conductive array line, a second select voltage on a second conductive array line, the two conductive array lines being uniquely defined. Additionally, an unselect voltage is applied to the unselected conductive array lines. The unselect voltage can be applied before, after or during the selection process. The unselect voltage can be approximately equal to the average of the first select voltage and the second select voltage.


Edmond Ward Photo 7
Method For Fabricating Multi-Resistive State Memory Devices

Method For Fabricating Multi-Resistive State Memory Devices

US Patent:
8611130, Dec 17, 2013
Filed:
Nov 21, 2011
Appl. No.:
13/301490
Inventors:
Darrell Rinerson - Cupertino CA, US
Christophe Chevallier - Palo Alto CA, US
Steve Kuo-Ren Hsia - San Jose CA, US
Wayne Kinney - Emmett CA, US
Steven Longcor - Mountain View CA, US
John Sanchez, Jr. - Palo Alto CA, US
Philip Swab - Santa Rosa CA, US
Edmond Ward - Monte Sereno CA, US
Assignee:
Unity Semiconductor Corporation - Sunnyvale CA
International Classification:
H01L 21/64, G11C 11/21
US Classification:
365148, 438385
Abstract:
A treated conductive element is provided. A conductive element can be treated by depositing either a reactive metal or a very thin layer of material on the conductive element. The reactive metal (or very thin layer of material) would typically be sandwiched between the conductive element and an electrode. The structure additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays.


Edmond Ward Photo 8
Method Of Uniformly Coating A Substrate

Method Of Uniformly Coating A Substrate

US Patent:
5670210, Sep 23, 1997
Filed:
Dec 1, 1995
Appl. No.:
8/566227
Inventors:
Robert P. Mandal - Saratoga CA
James C. Grambow - San Jose CA
Ted C. Bettes - Newark CA
Donald R. Sauer - San Jose CA
Emir Gurer - Sunnyvale CA
Edmond R. Ward - Monte Sereno CA
Assignee:
Silicon Valley Group, Inc. - San Jose CA
International Classification:
B05D 312
US Classification:
427240
Abstract:
A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapour and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.


Edmond Ward Photo 9
Memory Using Mixed Valence Conductive Oxides

Memory Using Mixed Valence Conductive Oxides

US Patent:
2006017, Aug 3, 2006
Filed:
Mar 30, 2005
Appl. No.:
11/095026
Inventors:
Darrell Rinerson - Cupertino CA, US
Christophe Chevallier - Palo Alto CA, US
Wayne Kinney - Emmett ID, US
Roy Lambertson - Los Altos CA, US
Steven Longcor - Mountain View CA, US
John Sanchez - Palo Alto CA, US
Lawrence Schloss - Palo Alto CA, US
Philip Swab - Santa Rosa CA, US
Edmond Ward - Monte Sereno CA, US
Assignee:
UNITY SEMICONDUCTOR CORPORATION - SUNNYVALE CA
International Classification:
G11C 11/34
US Classification:
365185100
Abstract:
A memory using a mixed valence conductive oxides. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.


Edmond Ward Photo 10
High-Density Nvram

High-Density Nvram

US Patent:
7180772, Feb 20, 2007
Filed:
Jul 11, 2005
Appl. No.:
11/179790
Inventors:
Darrell Rinerson - Cupertino CA, US
Steven W. Longcor - Mountain View CA, US
Edmond R. Ward - Monte Sereno CA, US
Wayne Kinney - Emmett ID, US
International Classification:
G11C 11/14
US Classification:
365171, 365173, 365158
Abstract:
A cross point array and peripheral circuitry that accesses the cross point array. The peripheral circuitry receives a supply voltage of approximately 1. 8 volts or less, generates voltages of a magnitude not more than approximately 3 volts, and senses current that is indicative of a nonvolatile memory state.