DOUGLAS R FREY
Engineers in Bethlehem, PA

2012000, Jan 5, 2012

Jun 30, 2010

12/828246

Douglas R. Frey - Bethlehem PA, US

H04M 1/00

37941302

A linefeed driver apparatus includes a first current mirror having an input leg for current Iand a mirrored leg for current I, wherein Ivaries proportionately to Iwith a gain of α. The input leg and the mirrored leg of the first current mirror are coupled to provide (α+1)Ito a driven line. The apparatus includes a second current mirror having an input leg for current Iand a mirrored leg for current I, wherein Ivaries proportionately to Iwith a gain of α. The mirrored leg of the second current mirror provides αIto the driven line, wherein α=α+1.

6747522, Jun 8, 2004

May 3, 2002

10/138027

David M. Pietruszynski - Austin TX
Douglas R. Frey - Bethlehem PA

Silicon Laboratories, Inc. - Austin TX

H01G 438

331177R, 331 36 C, 331116 FE, 4551972

A method of tuning a DCXO includes the step of providing a coarse tuning array and a fine tuning array of capacitors fabricated on the same integrated circuit die. The coarse array is adjusted until the difference between a desired frequency and the output frequency corresponds to a change in capacitance no greater than half the range of the fine tuning array. In one embodiment, the fine tuning array is adjusted to mid-range before adjusting the coarse tuning array. A DCXO apparatus includes at least one integrated circuit segmented switched capacitor network providing a capacitance that is a nonmonotonic function of a composite input code. The segmented switched capacitor network includes parallel coupled binary weighted and thermometer coded switched capacitor networks for coarse and fine tuning, respectively.

6639534, Oct 28, 2003

Feb 14, 2002

10/076087

Douglas R. Frey - Bethlehem PA

Silicon Laboratories, Inc. - Austin TX

H03M 166

341144

A digital-to-analog conversion circuit includes first and second DACs. Switch circuitry couples a selected output of only one of the DACs to an output node at any given time. In one embodiment, a second output of the first DAC is coupled to the first output of the second DAC at a common node. The first output of the first DAC is coupled to a first switch node and a second output of the second DAC is coupled to a second switch node. A first switch couples the common node to the first switch node in response to a first switch signal. A second switch couples the common node to the second switch node in response to a second switch signal. The switch signals ensure that the common node is coupled through the first and second switches to only one of the first and second switch nodes at any given time.

6909390, Jun 21, 2005

Sep 23, 2003

10/670160

Douglas R. Frey - Bethlehem PA, US

Silicon Laboratories, Inc. - Austin TX

H03M001/66

341144, 341143

A digital-to-analog converter circuit for a subscriber line analog front end includes a differential amplifier, switch circuitry, and first and second current steering digital-to-analog converters (DAC), each DAC having a first and second output forming a differential DAC output. The switch circuitry couples the differential output of at most a selected one of the first and second DACs to a pair of switch nodes. When the differential output of the selected DAC is coupled to the pair of switch nodes, the differential output of the other DAC is shorted. A differential input of the differential amplifier is communicatively coupled to the pair of switch nodes. A differential output of the differential amplifier is coupled to drive a tip line and a ring line of a subscriber line. In various embodiments, the DACs, switch circuitry, and differential amplifier reside on the same semiconductor substrate.

5631968, May 20, 1997

Jun 6, 1995

8/469440

Douglas R. Frey - Bethlehem PA
Patrick Copley - Sunnyvale CA

Analog Devices, Inc. - Norwood MA

H03G 700

381106

A signal conditioning circuit compresses an audio signal by producing a gain signal that is a function of the time-averaged audio signal and a compression ratio, and amplifying the audio signal by an exponential function of the gain signal. The conditioning circuit merges the functions of buffering the audio signal and producing a full-wave rectified version of the audio signal into a single buffer circuit. An averaging circuit generates a time-averaged signal in response to the full-wave rectified signal. An interface circuit includes downward expansion, compression and limiting circuits for scaling the time-averaged signal with a low compression ratio when it is less than a break point, with a selected compression ratio when it is between the break point and a rotation point, and with a high compression ratio when it exceeds the rotation point. The interface circuit produces the gain signal in response to the time-averaged signal and the corresponding compression ratio. A voltage controlled amplifier amplifies the buffered input signal by an exponential function of the gain signal to produce a compressed output signal.

5266881, Nov 30, 1993

Apr 29, 1991

7/692629

Philip K. Hoffman - Wilmington VT
Douglas Frey - Bethlehem PA

Solid State Chargers Research and Development Limited - Clinton MD

H02J 700

320 21

A high current battery charger of the driven blocking oscillator type includes a three-winding transformer. The primary winding is connected in series with the collector-emitter path of a switching power transistor. The secondary winding is connected in series with the collector-emitter path of a sense transistor which responds to the current flowing through the switching power transistor. The tertiary winding is connected in series with the battery, series-connected batteries or series-connected battery packs sought to be recharged, via a diode, which may be connected in parallel with a capacitor. The battery or batteries are charged by current pulses and discharge through the tertiary winding to repolarize the diode (and capacitor if present). The secondary winding is poled, with respect to the tertiary winding so that the blocking oscillator is driven by energy from the battery or batteries. The battery charger can operate over a wide range of input voltages with high efficiency, making it useful worldwide.

5270635, Dec 14, 1993

Feb 14, 1992

7/838853

Philip K. Hoffman - Wilmington VT
Douglas R. Frey - Bethlehem PA

Solid State Chargers, Inc. - Cockeysville MD

H02J 710

320 21

A battery charger of the driven blocking oscillator type includes a three-winding transformer. The primary winding is connected in series with the collector-emitter path of a switching transistor. The secondary winding is connected in series with the collector-emitter path of a sense transistor which responds to the current flowing through the switching transistor. The tertiary winding is connected in series with the battery, series-connected batteries or series-connected battery packs sought to be recharged, via a diode, which may be connected in parallel with a capacitor. No smoothing capacitor is provided across the battery or batteries. The battery or batteries are charged by current pulses and discharge through the tertiary winding to repolarize the diode (and capacitor if present). The secondary winding is poled, with respect to the tertiary winding so that the blocking oscillator is driven by energy from the battery or batteries. The battery charger can operate over a wide range of input voltages with high efficiency, making it useful worldwide.

5585757, Dec 17, 1996

Jun 6, 1995

8/469446

Douglas R. Frey - Bethlehem PA

Analog Devices, Inc. - Norwood MA

G06G 720, G06G 724

327348

An explicit RMS detector sequentially performs the square, mean and square-root operations in the log domain. An input signal is first applied to a log converter, and then to a times two multiplier which squares the input signal. A log filter averages the log square input signal for a predetermined period to approximate the "mean" operation, after which a times one-half multiplier operates on the log mean-square input signal to compute the square root. An exponentiator exponentiates the resulting log root-mean-square input signal to produce an output signal that approximates the RMS value of the input signal for the predetermined period.

2009024, Oct 1, 2009

Mar 31, 2008

12/060261

Riad Wahby - Austin TX, US
Douglas R. Frey - Bethlehem PA, US
Zhimin Li - Austin TX, US
Xun Yang - Austin TX, US
Marius Goldenberg - Austin TX, US
Ion C. Tesu - Austin TX, US
Jeffrey A. Whaley - Austin TX, US

G05F 1/00

323283

One embodiment of a power supply apparatus includes a switching regulator generating an output voltage VOUT at an output node from an input voltage VIN at an input node in accordance with a pulse width modulated signal having a nominal frequency of f. A pulse width modulator provides the pulse width modulated signal in accordance with a pulse control signal. A digital control loop sampling the second voltage to provide an m-bit sampled value at a sampling rate, f. The digital control loop includes a loop filter providing a filtered value from the sampled value and a delta sigma modulator sampling the filtered value as an n-bit value at a frequency fto provide the pulse control signal, wherein m>n.

2009024, Oct 1, 2009

Apr 1, 2008

12/060262

Michael J. Mills - Austin TX, US
Riad Wahby - Austin TX, US
Geoffrey Thompson - Austin TX, US
Douglas R. Frey - Bethlehem PA, US
Zhimin Li - Austin TX, US
Siddharth Sundar - Austin TX, US
Ion C. Tesu - Austin TX, US

G05F 1/618

323282

A switching regulator apparatus includes an inductor coupling an input node to a switching node. A first capacitor couples the switching node to a diode node. A first diode couples the diode node to a common node. A second diode couples the diode node to an output node. A second capacitor couples the output node to the common node. A switch couples the switching node to the common node, wherein the first capacitor transfers energy from the input node to the output node in accordance with the commutation of the switch.