Inventors:
Deepika Bhayana - South Grafton MA, US
Jean-Pierre Bono - Westboro MA, US
Assignee:
EMC Corporation - Hopkinton MA
International Classification:
G06F 12/08
US Classification:
711144, 711145, 711170, 711207
Abstract:
The present invention augments each entry in a memory frame table to include information associated with the availability of any page that is buffer cache allocated. The availability information may include, for example, a link to a buffer cache descriptor associated with a buffer cache allocated page. Alternatively, the availability information may include a use status of the buffer cache allocated page. During a consecutive multi-page allocation process, pages which are buffer cache allocated are checked for availability. Should a buffer cache allocated page be available for use, it is intelligently pre-empted by the allocation process. By providing a mechanism to readily determine buffer cache page availability, a multi-page allocation process with increased efficiency may make intelligent decisions about the appropriateness of buffer cache page pre-emption.