DAVID PAUL LESTER
Pilots at Cottonwood Ln, Phoenix, AZ

2006008, Apr 20, 2006

Oct 15, 2004

10/966877

Luciano Zoso - Chandler AZ, US
Allan Chin - Phoenix AZ, US
David Lester - Phoenix AZ, US

H04R 5/00, H04H 5/00

381023000, 381002000, 381016000

A BTSC encoder includes a sum channel (L+R), a difference channel (L−R), and one or more of a phase compensator and an amplitude compensator. The sum channel (L+R) has a L audio input for receiving a digital L audio signal, a right (R) audio input for receiving a digital R audio signal, and an output for providing a digital L+R signal. The difference channel (L−R) has a L audio input for receiving the digital L audio signal, a right (R) audio input for receiving the digital R audio signal, and an output for providing a digital L−R signal. The phase compensator is coupled to the sum channel and/or the difference channel, and is for compensating for a phase difference between the digital L+R signal and the digital L−R signal. The amplitude compensator is coupled to the sum channel and/or the difference channel, for compensating for an amplitude difference between the digital L+R signal and the digital L−R signal.

2006018, Aug 24, 2006

Feb 18, 2005

11/061155

Luciano Zoso - Chandler AZ, US
Allan Chin - Phoenix AZ, US
David Lester - Phoenix AZ, US

H04H 5/00, H04R 5/00

381002000, 381023000, 381006000

A digital BTSC (Broadcast Television Systems Committee) encoder () featuring integrated digital FM modulation comprises a digital BTSC audio processor () and a digital FM modulator (). The digital BTSC audio processor module () is responsive to a left audio input signal () and a right audio input signal () for digitally encoding the left and right audio input signals into a digital composite audio signal (). The digital FM modulator () is responsive to the digital composite audio signal () for FM modulating the digital composite audio signal into a digital FM modulated composite audio signal () and outputting the digital FM modulated composite audio signal.

7403624, Jul 22, 2008

Dec 23, 2003

10/744619

Luciano Zoso - Chandler AZ, US
Allan P. Chin - Phoenix AZ, US
David P. Lester - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

H04R 5/00

381 2, 348485

A BTSC encoder includes dual channel ADC, sync separator, audio processor, filtering device, and a composite audio signal generating device. The filtering device includes a first filter for providing a filtered L+R signal, and a second filter for providing at least one of: i) a filtered and combined pilot and modulated L−R signal and ii) separately filtered pilot and modulated L−R signals. The composite audio signal generating device is responsive to the filtered L+R signal, and at least one of i) the filtered and combined pilot and modulated L−R signal and ii) the separately filtered pilot and modulated L−R signals for generating and outputting a composite analog audio signal. In all embodiments, the modulated L−R signal is filtered via an anti-splatter filter.

7327288, Feb 5, 2008

Mar 30, 2006

11/394254

Luciano Zoso - Chandler AZ, US
Allan P. Chin - Chandler AZ, US
David P. Lester - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

H03M 7/00

341 61, 708313

A variable interpolator () has an interpolation factor L for performing an interpolation of an input signal (), where L is variable and includes a minimum value. The variable interpolator includes a differentiator (-), a chopper (), and an integrator (-). The differentiator (-) is responsive to a signal on the differentiator input for performing a differentiator portion of the interpolation and for providing a differentiator result signal (). The chopper is coupled with the differentiator for chopping the differentiator result signal as a function of the minimum value of L, wherein for an interpolator input signal that contains non-uniformly sampled signals in which there exists at least one sample of a shortest duration and at least one sample of a duration that extends beyond the shortest duration, the minimum value of L corresponds to the duration of the sample of shortest duration, and wherein for an interpolator input signal that contains uniformly sampled signals in which the samples are of a fixed duration, the minimum value of L corresponds to the fixed duration. The integrator is responsive to the chopped differentiator result signal for performing an integrator portion of the interpolation and for providing an integrator result signal, corresponding to an output () of the variable interpolator.

7512391, Mar 31, 2009

May 24, 2005

11/136752

David P. Lester - Phoenix AZ, US
Allan P. Chin - Phoenix AZ, US
Luciano Zoso - Chandler AZ, US

Freescale Semiconductor, Inc. - Austin TX

H04B 1/06

455260, 455306, 455340, 333205, 333219

A self-aligning resonator filter, a self-aligning coupled resonator filter circuit, and a television tuner circuit incorporating the filter and the circuit are disclosed herein. The self-aligning resonator filter leverages the local oscillator of the tuner circuit and can be realized with a significant reduction in the amount of off-chip components. The self-aligning resonator filter is configured to align its tunable resonator to resonate at a desired frequency in response to a phase difference measured across a resistance element during a tuning mode, and the resistance element is switched out of the self-aligning resonator filter during a run mode. The self-aligning coupled resonator filter circuit is configured to isolate its individual resonator stages during tuning such that each resonator stage can be aligned without being influenced by the other resonator stage. The television tuner circuit can be manufactured at relatively low cost while retaining high performance and the ability to be dynamically aligned while in use.

7286070, Oct 23, 2007

Nov 21, 2005

11/284566

Luciano Zoso - Chandler AZ, US
Allan P. Chin - Phoenix AZ, US
David P. Lester - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

H03M 3/00

341143, 341144, 341147

An RF carrier generator comprises a circuit for sequentially counting as a function of a randomized offset and time interval, and a memory coupled to the sequential counting circuit. The memory stores samples of a desired Sigma-Delta modulator sequence bit stream. Responsive to an output of the sequential counting circuit, the memory sequentially outputs a single-bit output bit stream of a series of partial sequences of the desired Sigma-Delta modulator sequence bit stream. A method is also disclosed.

2006018, Aug 24, 2006

Feb 18, 2005

11/060993

Luciano Zoso - Chandler AZ, US
Allan Chin - Phoenix AZ, US
David Lester - Phoenix AZ, US

H04H 5/00

381002000, 381006000, 381014000

A method of digital BTSC (Broadcast Television Systems Committee) encoding featuring integrated digital FM modulation comprises digitally encoding and FM modulating. A left audio input signal () and a right audio input signal () are digitally encoded into a digital composite audio signal () via a digital BTSC audio processor (). Responsive to the digital composite audio signal (), a digital FM modulator () digitally FM modulates the digital composite audio signal () into a digital FM modulated composite audio signal ().

7561076, Jul 14, 2009

Apr 29, 2005

11/117820

Luciano Zoso - Chandler AZ, US
Allan P. Chin - Phoenix AZ, US
David P. Lester - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

H03M 7/00, H03M 1/12, G06F 17/10, G06F 17/17

341 61, 341155, 708300, 708313

A NICAM encoding method comprises performing NICAM processing and coupling a front-end to the NICAM processing. The front-end processing operates with a system clock that is integer divisible such that the system clock can be used by both the NICAM processing and the front-end processing. The front-end processing includes a front-end input processing and a front-end output processing. The front-end input processing is coupled to an input of the NICAM processing and the front-end output processing is coupled to an output of the NICAM processing.

2007007, Apr 5, 2007

Sep 30, 2005

11/240315

Luciano Zoso - Chandler AZ, US
Allan Chin - Phoenix AZ, US
David Lester - Phoenix AZ, US

H04N 11/00

348462000, 348038000

A NICAM processor comprises a first memory for temporarily storing a current frame of A-channel and B-channel input data, wherein the current frame data is stored into the first memory at a first clock rate. A second memory temporarily stores companded A-channel and B-channel data of a previous frame in a format other than an interleaved format according to NICAM standard requirements. An interleaving circuit reads the previous frame companded data from the second memory at a second clock rate and in a manner for interleaving the previous frame data into the NICAM standard required interleaved format. A bit stream generator generates a first portion of an output bit stream, multiplexes it with a payload portion, and outputs the output bit stream, wherein the first portion comprises a frame alignment word, control information and additional data, and the payload portion comprises the interleaved data of the previous frame. A companding and storing circuit compands the input data of the current frame and stores the companded data into the second memory at a third clock rate and in the format other than the NICAM interleaved format. The companding and storing circuit is operative during an interval within the current frame, subsequent to the storing into the first memory and the reading from the second memory.