DAVID P JOHNSON, MD
Medical Practice at Providence Dr, Newberg, OR

6488369, Dec 3, 2002

Jan 31, 2000

09/495060

Charles R Steinmetz - Corvallis OR
Scott D Sturgeon - Vancouver WA
David C Johnson - Portland OR
Jeffrey T Hendricks - Camas WA

Hewlett-Packard Company - Palo Alto CA

B41J 2175

347 86, 347 50

The present disclosure relates to a replaceable ink reservoir for installation into a printing system that has a moveable carriage for repositioning a printing portion relative to print media. The replaceable ink reservoir includes an ink reservoir that does not have an integral printing portion. Also included is an electrical storage device for storing information. The installation of the ink reservoir into the moveable carriage establishes both fluid communication between the ink reservoir and the moveable carriage and establishes electrical continuity between the electrical storage device and the moveable carriage.

4853846, Aug 1, 1989

Jul 29, 1986

7/890859

David B. Johnson - Portland OR
Ronald J. Ebersole - Beaverton OR
Joel C. Huang - Portland OR
Manfred Neugebauer - Erlangen, DE
Steven R. Page - Hillsboro OR
Keith S. Self - Aloha OR

Intel Corporation - Santa Clara CA

G06F 1200, G06F 1202, G06F 1208, G06F 1212

364200

Control logic for controlling references to a cache (24) including a cache directory (62) which is capable of being configured into a plurality of ways, each way including tag and valid-bit storage for associatively searching the directory (62) for cache data-array addresses. A cache-configuration register and control logic (64) splits the cache directory (62) into two logical directories, one directory for controlling requests from a first processor and the other directory for controlling requests from a second processor. A prefetch buffer (63) is provided along with a prefetch control register for splitting the prefetch buffer into two logical channels, a first channel for handling prefetches associated with requests from the first processor, and a second channel for handling prefetches associated with requests from the second processor.

4903270, Feb 20, 1990

Jun 14, 1988

7/206418

David B. Johnson - Portland OR
Mark S. Myers - Portland OR
Eileen Riggs - Hillsboro OR

Intel Corporation - Santa Clara CA

G06F 1116

371 681

An integrated circuit module (200) in which an error detection circuit (234, 263) compares data (204) generated internally on module (200) with data (108) generated externally from another substantially identical module (100). An error detect output (238) is asserted upon the condition that data (204) generated internally on module (200) and data (108) generated externally from module (100) do not match. A circuit (222, 224) alters the internally generated data (204) by injecting erroneous data into the internally generated data (204) to thereby generate altered data (230). Error anticipation control logic (210) generates a test condition (214, 216), which corresponds to the expected error condition caused by altered data. Comparison circuit (242) compares the actual error detect output (238, 240) with expected error detect output (214, 215). An error output (244) is asserted if the actual error detect output (238, 240) and the expected error detect output (214, 216) do not match.

4792955, Dec 20, 1988

Aug 21, 1986

6/898522

David B. Johnson - Portland OR
Stanley Kenoyer - Forest Grove OR
Mark S. Myers - Portland OR
Sven Nilsson - Deisenhofen, DE

Intel Corporation - Santa Clara CA

G06F 1120

371 68

An error-checking system in which two substantially identical modules are checked by comparing the outputs (43, 63) from the chip logic (41, 61) on each modules with each other. One module is designated a master and the other module is designated a checker. The compare logic (46 or 66) is functional only when the module that it is on is designated as the checker. A control bit designates a module as either a master or a checker. A second control bit indicates when in a first state, that a module designated as a master drives the bus, and when in a second state that a module designated as a master and a module designated as a checker alternately drive the bus. Circuitry distinguishes a warm initialization from a cold initialization. A bit in a register causes a module designated as a master to become a checker upon every alternate warm initialization, so that the module alternates between being a master and a checker only each time a warm initialization occurs.

6293665, Sep 25, 2001

May 17, 1999

9/313340

Jeffrey K. Pew - Lake Oswego OR
David C. Johnson - Portland OR

Hewlett-Packard Company - Palo Alto CA

B41J 2175

347 87

An ink-jet writing system having a pen and a detachable ink reservoir. The pen includes a dual capillarity ink accumulator wherein a balance is provided such that the pen nozzles will neither drool ink nor suck up air when the pen is decoupled from the reservoir. A high capillarity member and a low capillarity member of the accumulator respond to changes in volume of a gas bubble within the pen to absorb or expel ink when operational and ambient atmospheric pressure changes occur.

6056394, May 2, 2000

Nov 26, 1997

8/979993

Gerard H. Rousseau - Portland OR
Brent R. Jones - Tualatin OR
David W. Johnson - Tigard OR
John A. Wright - Molalla OR

Tektronix, Inc. - Wilsonville OR

B41J 2175

347 88

A solid ink stick feed system for use in a color printer is disclosed that utilizes a plurality of ink stick feed receptacles in an ink stick feed bin of predetermined shapes corresponding to the plurality of shapes of the ink sticks such that an incorrectly matched ink stick shape or incorrectly oriented ink stick is retained in a raised position to indicate to the printer operator that the ink stick should be removed and to facilitate grasping and removing such ink stick.