Inventors:
Akella V.S. Satya - Milpitas CA, US
Gustavo A. Pinto - Belmont CA, US
David L. Adler - San Jose CA, US
Robert Thomas Long - Santa Cruz CA, US
Neil Richardson - Palo Alto CA, US
Kurt H. Weiner - San Jose CA, US
David J. Walker - Sunol CA, US
Lynda C. Mantalas - Campbell CA, US
Padma A. Satya - Milpitas CA, US
International Classification:
H01L 23/58, H01L 21/00
US Classification:
257 48, 438 5, 257E23001, 257E21001
Abstract:
Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.