DAVID L CORKUM
Engineering in South Attleboro, MA

6765391, Jul 20, 2004

Oct 22, 2002

10/277797

David L. Corkum - Attleboro MA
Keith W. Kawate - Attleboro Falls MA
Thomas R. Maher - Rehoboth MA

Texas Instruments Incorporated - Dallas TX

G01R 2702

324610, 324725, 324648, 324706

An ASIC ( ) conditions two independent outputs (VINM, VINP) of a full Wheatstone piezoresistive bridge ( ) in separate conditioning paths. Each path is provided with a bridge supply voltage (VHB , VHB ) which can serve as a temperature related input signal to respective offset and gain compensation control circuits. The half bridge outputs are inputted to respective amplifiers (U , U ) along with a selected percentage of the temperature dependent bridge supply voltage. The outputs of the amplifiers provide a signal proportional to respective half bridge output voltage. In one embodiment, the output of the amplifier (U ) in one conditioning path of one half bridge is connected to the input of an amplifier (U ) in the other conditioning path to provide a signal in the one path proportional to the Wheatstone bridge differential output voltage and in the other path a signal proportional to the Wheatstone half bridge output voltage. In another embodiment, the temperature dependent bridge supply voltage is multiplexed for a selected time upon power-up to an amplifier (U ) which normally receives an input from one of the bridge outputs.

6433554, Aug 13, 2002

Dec 20, 1999

09/468260

Keith W. Kawate - North Attleboro MA
David L. Corkum - Attleboro MA
Thomas R. Maher - Rehoboth MA

Texas Instruments Incorporated - Dallas TX

G01R 3100

324500, 324526, 324610, 324706, 324705

An in-range fault detection system for a full wheatstone bridge element ( ) having piezoresistive elements (R , R , R , R ) has bridge outputs (INP, INM) connected to measuring means in the form of a first circuit portion ( ) to provide a common mode voltage (V ). A second circuit portion ( ) is used to provide a centering voltage (C*V ) equal to the common mode voltage at the time of sensor calibration and a third circuit portion ( ) is used to provide a small window voltage (W*V ) which is a fraction of bridge voltage. The value (W*V ) is subtracted from (C*V ) at a first summing circuit (SUM ) and added to (C*V ) at a second summing circuit (SUM ) and the results are each compared to the common mode voltage by comparators (Q , Q ) which are then determined to be within or without a window of valid values by an OR gate (Q ).

6646446, Nov 11, 2003

Sep 14, 2001

09/952257

Thomas R. Maher - Rehoboth MA
David L. Corkum - Attleboro MA

Texas Instruments Incorporated - Dallas TX

G01R 1710

324526, 324610, 324725, 73 111, 702 88

A full Wheatstone bridge sensor has conditioning electronics of an ASIC connected thereto. Two independently controlled diagnostic switches (S1, S2) in the ASIC are commonly connected to one of the bridge output nodes. The first diagnostic switch connects first resistor between the bridge output node and bridge supply voltage and the second diagnostic switch connects a second resistor between the bridge output and bridge ground. The first diagnostic switch closes during a first diagnostic waveform phase and opens during all other phases of operation. The second diagnostic switch closes during a second and third waveform phase and opens during all other phases of operation. The diagnostic waveforms are used to test major signal conditioning and fault reporting paths of the ASIC.

2007005, Mar 8, 2007

Sep 1, 2005

11/217903

Costas Hadjiloucas - North Attleboro MA, US
Sean Mulligan - South Boston MA, US
David Corkum - Attleboro MA, US
Alfred Hopkins - Attleboro Falls MA, US

H01L 29/84

257417000

Highly corrosion resistant electrically conductive contact systems suitable for semiconductor pressure sensor devices exposed to acidic, elevated temperature environments, such as automotive exhaust gas environments, are disclosed. The preferred embodiment () comprises a platinum top layer (), and a tantalum lower layer (). Both are highly electrically conductive layers and exhibit corrosion resistance to acidic environments. The top layer of the metallization also provides a suitable material for the external connectivity (e.g., wire bonding, solder bumping, chip-chip fusion). The lower layer of the metallization also serves as an adhesion layer between the top metal and lower layers, typically silicon based glasses and in some cases serves as a diffusion barrier.

5824902, Oct 20, 1998

Sep 30, 1996

8/723434

David L. Corkum - Attleboro MA
June Park - Providence RI
Keith W. Kawate - Attleboro Falls MA

Texas Instruments Incorporated - Dallas TX

G01P 15125

7351432

A first embodiment of a condition responsive capacitive transducer, such as an accelerometer (1), is shown in which an electrically conductive sensor element (14) is sandwiched between upper (10) and lower (12) electrically insulative planar substrates and mounted in sealed, spaced apart relation by patterns (16) of adhesive containing spacing elements. A second embodiment (100) includes a signal conditioning capacitor having plate portions (114r, 120b and 114s, 120c) on either side of a condition responsive capacitor to minimize errors caused by translational movement of the sensor element (114) relative to the substrates (110, 112). Circuit conditioning electronics (124) is shown mounted directly on one of the substrates (110) and the sensor is mountable directly on a circuit board. A third embodiment (200) shows differential capacitors (224, 226, 228, 230, 232, 234) for minimizing errors due to misalignment of the movable element (114) with respect to the fixed supports (210, 212). Another embodiment provides a material system for use in condition responsive capacitive transducers having refractory metal for a sensing element and glass material for a supporting substrate.

6249239, Jun 19, 2001

Nov 5, 1999

9/435299

David L. Corkum - Attleboro MA

Texas Instruments Incorporated - Dallas TX

H03M 178

341154

A potentiometric digital to analog converter includes switches to electrically connect a string of n resistors between two voltage supplies to charge a first capacitor (C. sub. 1) through a first tap and store the charge and then to reverse the electrical connections of the string to the two power supplies to charge a second capacitor (C. sub. 2) through a second tap connected at an inverse location symmetrical about the average voltage of the voltages at the supply connectivity switches and store the charge of the second capacitor. The voltage (V. sub. A, V. sub. B) on the two capacitors is then averaged to provide a ratiometric output voltage which is insensitive to the drift of values of the string of resistors.

2012029, Nov 15, 2012

May 10, 2011

13/104077

David L. Corkum - Attleboro MA, US

G06F 11/07

714 49, 714E11024, 714E11025

A system is configured to monitor a received signal. In response to detecting a fault condition associated with the received signal, the system sets a fault status indicator to indicate occurrence of the detected fault condition. The system sets a state of the fault status indicator for at least a predetermined amount of time to indicate occurrence of the detected fault condition. Subsequent to setting the fault status indicator for at least the predetermined amount of time to indicate the occurrence of the detected fault condition, the system monitors integrity of the signal again. After the predetermined amount of time, in response to detecting that there is no longer a fault associated with the monitored signal, the system modifies the fault status indicator to indicate absence of the fault condition.

2008014, Jun 19, 2008

Dec 19, 2007

11/959718

David L. Corkum - Attleboro MA, US
Aziz U. Batur - Dallas TX, US
Douglas Strott - Plainville MA, US
Leonardo Estevez - Rowlett TX, US

Texas Instruments Incorporated - Dallas TX

H04N 7/18

3482086, 34820899, 348E05046

Deblurring digital camera images captured in low-light, long-integration-time conditions by capturing multiple short-integration images and fusing with on-the-fly motion estimation and alignment to limit the frame memory requirements. In one embodiment, an image stabilization system includes: (1) a frame memory and (2) a processor coupled to the frame memory and configured to store a first short-integration digital image in the frame memory, determine a displacement of a second short-integration digital image relative to the first short-integration digital image, combine the second short-integration digital image with the first short-integration digital image to form a fused digital image and overwrite the first short-integration digital image with the fused digital image.

7031863, Apr 18, 2006

Dec 22, 2003

10/743363

Thomas R. Maher - Rehoboth MA, US
David L. Corkum - Attleboro MA, US

Texas Instruments Incorporated - Dallas TX

G01C 19/00

702104, 702 57, 702 58, 702 59

Signal conditioning of multiple sense elements is shown for providing information to a system requiring high accuracy and robust fault coverage. A first signal conditioning ASIC () pre-conditions the sense element data and a second system control ASIC () mathematically solves predetermined compensation relations based on the output of ASIC () and stored compensation data to fully condition the sensor output signal(s). The sense elements () are each formed by two half bridges whose inputs are pre-conditioned by separate, identical signal conditioning paths to provide highly accurate sense and diagnostic information.