DAVID HAYNES WRIGHT
Pilots at Summerside Dr, San Jose, CA

License number
California A5219545
Issued Date
Jun 2016
Expiration Date
Jun 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
945 Summerside Dr UNIT B, San Jose, CA 95122

Professional information

David Wright Photo 1

Senior Scientist At Thermo Fisher Scientific

Position:
Senior Scientist at Thermo Fisher Scientific
Location:
San Francisco Bay Area
Work:
Thermo Fisher Scientific - San Jose since May 2007 - Senior Scientist Thermo Fisher Scientific - San Jose, CA Aug 1994 - May 2007 - Senior Software Engineer
Education:
Michigan State University
Doctor of Philosophy (Ph.D.), Physical Chemistry
Grinnell College
Bachelor of Arts (B.A.), Chemistry


David Wright Photo 2

Method And Apparatus For Binding Peripheral Devices To A Computer

US Patent:
8384670, Feb 26, 2013
Filed:
Oct 28, 2009
Appl. No.:
12/607282
Inventors:
David G. Wright - San Jose CA, US
Assignee:
Cypress Semiconductor Corporation - San Jose CA
International Classification:
G09G 5/00
US Classification:
345168, 345156, 713176, 703 23
Abstract:
A non-keyboard computer peripheral device represents itself to a host computer as having a keyboard function in addition to representing its actual function. Keyboard status signals are generated by the host computer in response to a user pressing different keys on an actual keyboard. The peripheral device uses the keyboard status signals to identify different peripheral device operations selected by the user. In one example, a radio receiving device represents itself to the host computer as including the keyboard function. Pressing a button on the receiving device causes the receiving device to send a sequence of keystroke commands to the host computer that cause the host computer to initiate software applications and to display operating instructions to a user. A series of further binding operations are then executed in accordance with the displayed operating instructions.


David Wright Photo 3

Analog Bus Sharing Using Transmission Gates

US Patent:
8441298, May 14, 2013
Filed:
Jul 1, 2009
Appl. No.:
12/496579
Inventors:
Timothy Williams - San Jose CA, US
David G. Wright - San Jose CA, US
Harold Kutz - San Jose CA, US
Eashwar Thiagarajan - San Jose CA, US
Warren Snyder - San Jose CA, US
Mark E. Hastings - San Jose CA, US
Assignee:
Cypress Semiconductor Corporation - San Jose CA
International Classification:
H03L 5/00, H01L 25/00
US Classification:
327333, 327564, 327565, 326 41, 326 47
Abstract:
In one example, a chip includes an integrated analog component configured to communicate over an internal analog bus of the chip. A plurality of I/O pads located on the chip is configured to provide a connected device access to the integrated analog component. A plurality of transmission gates configured to selectively connect the I/O pads to a bus line of the analog bus.