DAVID H NGUYEN, PHARMD
Pharmacy at Senter Rd, San Jose, CA

8205056, Jun 19, 2012

Sep 12, 2011

13/230741

Richard M. Barth - Palo Alto CA, US
Frederick A. Ware - Los Altos Hills CA, US
Donald C. Stark - Los Altos CA, US
Craig E. Hampel - San Jose CA, US
Paul G. Davis - San Jose CA, US
Abhijit M. Abhyankar - Sunnyvale CA, US
James A. Gasbarro - Mountain View CA, US
David Nguyen - San Jose CA, US

Rambus Inc. - Sunnyvale CA

G06F 12/00

711167, 711106, 711E12001

A memory controller has an interface to convey, over a first set of interconnect resources: a first command that specifies activation of a row of memory cells, a second command that specifies a write operation directed to the row of memory cells, a bit that specifies whether precharging will occur in connection with the write operation, a code that specifies whether data mask information will be issued in connection with the write operation, and if the code specifies that data mask information will be issued, data mask information that specifies whether to selectively write portions of write data associated with the write operation. The memory controller interface further conveys, over a second set of interconnect resources, separate from the first set of interconnect resource, the write data.

7162376, Jan 9, 2007

Feb 22, 2005

11/063490

Kyung Suk Oh - Campbell CA, US
Frank Lambrecht - Mountain View CA, US
David Nguyen - San Jose CA, US

Rambus Inc. - Los Altos CA

G11C 7/14

702 57, 702 64, 702 80, 702107, 36518909

A system comprises a master device and a plurality of memory devices coupled to the master device by an interconnect in an embodiment. The master device obtains a plurality of values representing reference voltage values and selects a first value in the plurality of values representing reference voltage values to generate an internal reference voltage value when reading data from a selected memory device in the plurality of memory devices. A method comprises obtaining a plurality of values representing reference voltages for a plurality of memory devices in an embodiment. A first value is selected in the plurality of values representing reference voltages. A reference voltage value is adjusted in response to the first value to an adjusted reference voltage value. Data is transferred to a selected memory device in the plurality of memory devices using the adjusted reference voltage value.

7740493, Jun 22, 2010

Oct 17, 2007

11/874108

Jim Chin-Nan Ni - San Jose CA, US
David Nguyen - San Jose CA, US
I-Kang Yu - Palo Alto CA, US
Abraham Chih-Kang Ma - Fremont CA, US

SuperTalent Electronics, Inc. - San Jose CA

H01R 13/44

439131

A Universal Serial Bus (USB) flash drive includes a slim USB device having an end used to couple the USB flash drive to a host and an opposite end and a swivel cap having a side slit that serves as an opening into which the slim USB device travels horizontally, the side slit being disposed along a lateral side of the swivel cap. The USB flash drive also includes a USB device rivet placed into the slim USB device and the swivel cap to pivotally connect them at one of the ends of the slim USB device, so that the slim USB device is pivotally extendable outwardly from the side slit in a closed or open position. The swivel rocker is pivotally extendable outwardly from the opposite end of the slim USB device and when the swivel rocker is extended outwardly, the slim USB device is caused to extend outwardly.

8560797, Oct 15, 2013

Mar 15, 2012

13/421701

Richard M. Barth - Palo Alto CA, US
Frederick A. Ware - Los Altos Hills CA, US
Donald C. Stark - Los Altos CA, US
Craig E. Hampel - San Jose CA, US
Paul G. Davis - San Jose CA, US
Abhijit M. Abhyankar - Sunnyvale CA, US
James A. Gasborro - Mountain View CA, US
David Nguyen - San Jose CA, US

Rambus Inc. - Sunnyvale CA

G06F 12/00

711167, 711105, 711106, 711E12001

An apparatus for controlling a dynamic random access memory (DRAM), the apparatus comprising an interface to transmit, over a first plurality of wires, to the DRAM a first code to indicate that first data is to be written to the DRAM and a column address to indicate a column location of a memory core in the DRAM where the first data is to be written. The interface is further to transmit a second code to indicate whether mask information for the first data will be sent to the DRAM. If the second code indicates that mask information will be sent, a portion of the column address and a portion of the mask information are sent after the second code is sent. The interface is further to transmit to the DRAM, over a second plurality of wires separate from the first plurality of wires, the first data.

7364445, Apr 29, 2008

Apr 13, 2007

11/735349

Jim C. Ni - San Jose CA, US
David Nguyen - San Jose CA, US
Nan Nan - San Jose CA, US

Super Talent Electronics, Inc. - San Jose CA

H01R 13/44

439140

A USB device includes a printed circuit board assembly (PCBA), a metal shell secured to a front of the PCBA, a plastic frame secured to a rear of the PCBA, and a rubber case including a case body covering the plastic frame case such that a plug shell connector extends from the second front end opening. A rubber cap is removably mounted over the plug shell connector to entirely enclose the USB device when not in use. The rubber case is molded to include a cosmetic feature, such as a soccer ball, a sports team logo, or a company logo.

7170314, Jan 30, 2007

Feb 11, 2005

11/054955

Belgacem Haba - Cupertino CA, US
Richard E. Perego - San Jose CA, US
David Nguyen - San Jose CA, US
Ely Tsern - Los Altos CA, US
Crag E. Hampel - San Jose CA, US

Rambus Inc. - Los Altos CA

H03K 17/16, H03K 19/003

326 30, 333247, 174250

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.