DAVID GEORGE CLARK
Pilots at Woodbine Cir, Georgetown, TX
License number
Texas A4190853
Issued Date
Aug 2015
Expiration Date
Aug 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
2510 Woodbine Cir, Georgetown, TX 78628
Professional information
Integrated Circuit Layout Pattern For Cross-Coupled Circuits
US Patent:
7960759, Jun 14, 2011
Filed:
Oct 14, 2008
Appl. No.:
12/285795
Inventors:
Marlin Wayne Frederick - Austin TX, US
David Paul Clark - Georgetown TX, US
David Paul Clark - Georgetown TX, US
Assignee:
ARM Limited - Cambridge
International Classification:
H01L 23/52
US Classification:
257208, 257E27108
Abstract:
A circuit is provided comprising a first diffusion region and a parallel second diffusion region. A sequence of N gate layers is provided with a first and an Nth of these gate layers covering different respective ones of the diffusion regions whilst the middle (N−2) gate layers cover both diffusion regions. A bridging conductor connects the first gate layer and the Nth gate layer. In some embodiments, the second diffusion region is provided as two second diffusion sub-regions having a diffusion region gap therebetween and electrically connected via a jumper connector. A first gate layer which forms a gate electrode with a first diffusion region can extend through this diffusion region gap not forming a gate electrode therewith and facilitating use of a collinear bridging conductor to connect to the Nth gate layer.
Decoupling Capacitors
US Patent:
8134824, Mar 13, 2012
Filed:
Feb 19, 2008
Appl. No.:
12/071278
Inventors:
Marlin Frederick - Cedar Park TX, US
David Paul Clark - Georgetown TX, US
Jean-Luc Pelloie - Moirans, FR
Yew Keong Chong - New Braunfels TX, US
David Paul Clark - Georgetown TX, US
Jean-Luc Pelloie - Moirans, FR
Yew Keong Chong - New Braunfels TX, US
Assignee:
ARM Limited - Cambridge
International Classification:
H01G 4/228
US Classification:
3613062, 3613061, 3613063, 361303, 3613014, 361328
Abstract:
A decoupling capacitor is disclosed that has an n-type portion and a p-type portion in a semiconductor. The decoupling capacitor is formed of an NFET transistor and a PFET transistor, the PFET transistor being substantially formed in the n-type portion and the NFET transistor being substantially formed in the p-type portion, a boundary between the n-type portion and the p-type portion being substantially straight. The transistors are arranged such that a source and drain of the PFET transistor are connected to a high voltage rail and a source and drain of the NFET transistor are connected to a low voltage rail.
Compensating For Non-Uniform Boundary Conditions In Standard Cells
US Patent:
8051390, Nov 1, 2011
Filed:
Oct 7, 2008
Appl. No.:
12/285515
Inventors:
Marlin Wayne Frederick - Austin TX, US
David Paul Clark - Georgetown TX, US
David Paul Clark - Georgetown TX, US
Assignee:
ARM Limited - Cambridge
International Classification:
G06F 17/50
US Classification:
716 54, 716 50, 716 51, 716 52, 716 53, 716 55, 716139, 430 5, 430 30
Abstract:
A method of design of a standard cell and a standard cell is disclosed. The method design comprising the steps of: identifying a non-uniformity in a boundary condition of said standard cell that would affect a characteristic of a neighbouring standard cell; introducing a further non-uniformity into said cell to mitigate the effect of said identified non-uniform boundary condition on said characteristic of said neighbouring standard cell.