Position:
Design Engineer at Hewlett-Packard
Work:
Hewlett-Packard
since May 2011
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Design Engineer
Willowview Systems
Aug 2010 - May 2011
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Senior Electrical Engineer
Willowview Consulting
May 2009 - Aug 2010
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Senior Electrical Engineer
Motionetics
May 2008 - Aug 2010
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Senior Electrical Engineer
Marvell Semiconductor
Apr 2006 - Dec 2007
-
Sr Staff Engineer
Avago Technologies, Inc
Dec 2005 - Apr 2006
-
Master Hardware R&D Engineer
Agilent Technologies, Inc.
Apr 2005 - Dec 2005
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Master Hardware R&D Engineer
Cypress Semiconductor
Sep 2001 - Mar 2005
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Senior Member, Technical Staff
In-System Design
1995 - Sep 2001
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Chief Technical Officer, member of Board of Directors
In-Line Diagnostics
1988 - 1995
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V.P. of R&D
Hewlett Packard Company
1983 - 1988
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Design Engineer
Education:
Stanford 1983 - 1988
MSEE, Electrical and Electronics Engineering
University of Utah 1978 - 1983
BSEE, Minors in Math and Physics
Olympus High School 1976 - 1979
Felt High School 1975 - 1976
Honorary Degree, US History
Skills:
Verilog, Vera, Electronics, R&D, Hardware Design, FPGA, ASIC, Firmware, System Architecture, Development Tools, Patents, RTL coding, RTL Development, RTL verification, Assertion Based Verification, VHDL, Formal Verification, Project Management, Capital Budgeting, Hardware Architecture, SoC, SystemVerilog, Semiconductors, IC, Debugging, Integrated Circuit Design, Computer Architecture, NI LabVIEW, Labview, RTL design, VLSI, Microprocessors, Functional Verification