DAVID ALAN BEAUCHAINE
Pilots at 159 Ave, Vancouver, WA

6576501, Jun 10, 2003

May 31, 2002

10/160146

David A. Beauchaine - Vancouver WA
Timothy L. Brown - Vancouver WA
Sergei V. Koveshnikov - Vancouver WA
Romony San - Vancouver WA

SEH America, Inc. - Vancouver WA

H01L 21335

438143, 438476

A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.

2005022, Oct 20, 2005

Apr 16, 2004

10/826730

David Beauchaine - Vancouver WA, US
Aaron Newton - Vancouver WA, US

SEH America, Inc. - Vancouver WA

C23C016/00

118728000, 427249100

A support fixture is provided that includes a boat, a first layer deposited on at least a portion of the boat that has fewer impurities than the boat, and a second layer deposited on at least a portion of the first layer that is formed of a material having one or both of a hardness and a coefficient of thermal expansion that more closely matches the material properties of the wafers to be carried by the support fixture than does those of the boat and the first layer. For example, the boat and the first layer may be formed of silicon carbide and the second layer may be formed of polysilicon. A method of fabricating a support fixture having a boat coated with first and second layers, such as by sequential chemical vapor deposition steps, is also provided.

2005005, Mar 10, 2005

Sep 8, 2003

10/657606

David Beauchaine - Vancouver WA, US
Oleg Kononchuk - Brush Prairie WA, US

SEH America, Inc. - Vancouver WA

C01B013/00, H01L021/311

423219000, 438694000

A method and apparatus are provided for removing oxygen and moisture from a gas such that wafers subsequently exposed to the gas develop less haze. The apparatus includes a process chamber for receiving a wafer. The apparatus also includes a gettering filter in fluid communication with the process chamber for removing oxygen from a gas that passes through the gettering filter in route to the process chamber. The gettering filter includes a vessel and a plurality of pieces of an oxidizable material disposed within the vessel. The oxidizable material is selected to oxidize upon exposure to oxygen in the gas such that the gas exiting the vessel has less oxygen than the gas entering the vessel. The oxidizable material may also be selected such that the resulting oxide layer is etchable upon exposure to an etchant, thereby permitting the gettering filter to be regenerated.

2003022, Dec 4, 2003

Apr 9, 2003

10/410790

David Beauchaine - Vancouver WA, US
Timothy Brown - Vancouver WA, US
Sergei Koveshnikov - Vancouver WA, US
Romony San - Vancouver WA, US

H01L021/302, H01L021/461

438/690000

A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.

2003022, Dec 4, 2003

Apr 9, 2003

10/410792

David Beauchaine - Vancouver WA, US
Timothy Brown - Vancouver WA, US
Sergei Koveshnikov - Vancouver WA, US
Romony San - Vancouver WA, US

B32B009/04, H01L029/30

428/064100, 428/446000

A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.

2004006, Apr 1, 2004

Oct 1, 2002

10/260268

David Beauchaine - Vancouver WA, US
Aaron Newton - Vancouver WA, US
Mike Tabor - Vancouver WA, US

SEH AMERICA INC. - Vancouver WA

C23C016/00

118/724000

A gasket material made from expanded PTFE for sealing high purity semiconductor furnace operations is provided. The gasket may be used in place of O-rings made of fluoro-rubber or standard PTFE material. Gaskets made of expanded PTFE provide greater flexibility and thus gives a better seal than standard O-rings.