DR. CRAIG JON PETERSON, M.D.
Medical Practice at Executive Center Dr, Austin, TX
License number
Texas K0993
Category
Medical Practice
Type
Anatomic Pathology & Clinical Pathology
Address
Address
3445 Executive Center Dr SUITE 250, Austin, TX 78731
Phone
(512) 579-4000
(512) 439-2814 (Fax)
(512) 439-2814 (Fax)
Personal information
See more information about CRAIG JON PETERSON at radaris.comName
Address
Phone
505 Martin Luther King Dr, Bastrop, TX 78602
5102 Chestnut St, Bellaire, TX 77401
5100 Chestnut St, Bellaire, TX 77401
566 Raven Rdg, New Braunfels, TX 78130
5311 Verdant Way, Houston, TX 77069
Professional information
Dr. Craig J Peterson, Austin TX - MD (Doctor of Medicine)
Specialties:
Anatomic & Clinical Pathology
Address:
Clinical Pathology Associates
4900 Mueller Blvd, Austin 78723
(512) 579-4000 (Phone)
Clinical Pathology Associates
2400 Round Rock Ave, Round Rock 78681
(512) 579-4000 (Phone)
4900 Mueller Blvd, Austin 78723
(512) 579-4000 (Phone)
Clinical Pathology Associates
2400 Round Rock Ave, Round Rock 78681
(512) 579-4000 (Phone)
Certifications:
Anatomic & Clinical Pathology, 1996
Awards:
Healthgrades Honor Roll
Languages:
English
Hospitals:
Clinical Pathology Associates
4900 Mueller Blvd, Austin 78723
Clinical Pathology Associates
2400 Round Rock Ave, Round Rock 78681
Baptist Medical Center
111 Dallas St, San Antonio 78205
Seton Medical Center Austin
1201 West 38Th St, Austin 78705
4900 Mueller Blvd, Austin 78723
Clinical Pathology Associates
2400 Round Rock Ave, Round Rock 78681
Baptist Medical Center
111 Dallas St, San Antonio 78205
Seton Medical Center Austin
1201 West 38Th St, Austin 78705
Education:
Medical School
University of Mn Med Sch
Graduated: 1990
University Of Mn Med School
University of Mn Med Sch
Graduated: 1990
University Of Mn Med School
Craig Jon Peterson, Austin TX
Specialties:
Pathologist
Address:
9200 Wall St, Austin, TX 78754
3445 Executive Center Dr, Austin, TX 78731
3445 Executive Center Dr, Austin, TX 78731
Education:
Doctor of Medicine
Board certifications:
American Board of Pathology Certification in Clinical Pathology (Pathology)
Craig Peterson - Austin, TX
Work:
rcpwoodworks
flooring and trim carpenter hammonds woodfloors - San Antonio, TX
floor mechanic
flooring and trim carpenter hammonds woodfloors - San Antonio, TX
floor mechanic
Low Power, Slew Rate Insensitive Power-On Reset Circuit
US Patent:
5552725, Sep 3, 1996
Filed:
Aug 5, 1994
Appl. No.:
8/286685
Inventors:
S. Doug Ray - Austin TX
Craig M. Peterson - Austin TX
Craig M. Peterson - Austin TX
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H03K 1722
US Classification:
327143
Abstract:
An improved power-on reset circuit is provided for controlling reset signal transition until after the power supply has achieved operational levels. Specifically, the reset signal is designated to transition from a high to a low state after the power supply exceeds a fixed reference voltage. The reference voltage is set at a voltage value greater than the operational voltage level of devices within a load circuit connected to the output of the power-on reset circuit. The power-on reset circuit includes numerous subcircuits used to define the reference voltage, trigger the reference voltage in relation to the power supply voltage, delay the triggered voltage, and buffer the delayed, triggered voltage to a reset value capable of driving load circuit impedances.
Reduced Noise, Low Power, High Speed Output Buffer
US Patent:
5329175, Jul 12, 1994
Filed:
Nov 13, 1992
Appl. No.:
7/976264
Inventors:
Craig M. Peterson - Austin TX
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
H03K 19003, H03K 190948
US Classification:
307443
Abstract:
A reduced noise, low power, high speed output buffer circuit is provided for driving a load. The output buffer circuit utilizes multiple stage pull-up and pull-down transistors. During the time in which the first stage pull-down (or pull-up) transistor is activated, all of the opposing pull-up (or pull-down) transistors are deactivated at substantially the same time. Thereafter, the remaining stages of pull-down (or pull-up) transistors are activated. Delayed turn on in conjunction with rapid turn off achieves low overshoot and undershoot noise transient levels at the power supplies.