Clayton C Wahlquist
Engineers in Salt Lake City, UT

4524307, Jun 18, 1985

Apr 15, 1982

6/368780

Clayton C. Wahlquist - West Valley City UT

Tektronix, Inc. - Beaverton OR

H01J 2970

315368

A convergence control system suited for use with high resolution color display monitors or color television receivers. The system includes both primary and secondary convergence controls having minimal interaction between them. An exemplified convergence control system comprises circuitry designed to develop output signal waveforms for implementing the following expression: ##EQU1## where X is a horizontal deflection-related signal input to the system, K is a static control for adjusting convergence at the center of the CRT screen, K3 and K4 are left and right side convergence controls, and K1 and K2 are secondary controls for correcting residual misconvergence--i. e. , misconvergence at areas of the screen intermediate the areas converged using the K, K3 and K4 controls. A similar system is provided for providing vertical deflection-related convergence waveforms.

2005016, Jul 28, 2005

Jan 5, 2005

11/029327

David Burke - West Valley City UT, US
Timothy Gunn - Kerns UT, US
Spencer Kunzler - West Jordan UT, US
Steven Lingwall - West Valley City UT, US
Bryan Vanderwerff - Layton UT, US
Clayton Wahlquist - West Valley City UT, US

G06F017/00, G06F015/00

715500100, 370503000

An apparatus, system and method for synchronizing the playback of data transmitted over an asynchronous network. An initialization module may initialize at least two receivers to receive playback data from a transmission module. The transmission module may then transmit to the receivers the playback data, and, in some embodiments, synchronization data. Synchronization data may include a playback indicator by which the receivers may determine an appropriate playback data consumption rate. A buffer module may buffer a predetermined amount of playback data which may be played in response to a start signal individually addressed to the receivers.

4623825, Nov 18, 1986

Apr 5, 1982

6/365658

Clayton C. Wahlquist - West Valley City UT
H. Wayne Olmstead - Hillsboro OR

Tektronix, Inc. - Beaverton OR

H01J 2970, H01J 2956

315368

An electromagnetic deflection circuit is disclosed. The deflection circuit includes a plurality of loss elements. These loss elements are responsible for the production of an inherent time delay between the energization of the circuit by an input signal and the generation of a magnetic flux used to deflect an electron beam within a cathode-ray tube. According to an exemplified embodiment of the invention, a DC level shift signal generator, a beam position input signal generator, and an adder for adding the DC level shift signal to the beam position input signal produce an input signal that energizes the correction deflection circuit. The introduction of the DC level to the beam position input signal effectively advances, in time, the output signal from the convergence correction signal generator. This advance compensates for the various time delays present in the deflection circuit.

4473804, Sep 25, 1984

Feb 23, 1982

6/351580

Clayton C. Wahlquist - West Valley City UT

Tektronix, Inc. - Beaverton OR

H03F 345, H03F 326

330255

This application discloses a linear class B transconductance power amplifier suited for use in driving an inductive load, such as a convergence control coil for a color television receiver or video monitor. A preferred form of the amplifier includes a first pair of transistors having their emitters connected together and to a reference potential, their collectors being connected together and to a voltage source; and a second pair of transistors connected to the bases of the first pair of transistors and connected together in the form of a differential amplifier. The amplifier circuit operates as a noninverting operational amplifier when an input voltage has a positive polarity, and it operates as an inverting operational amplifier when the input voltage has a negative polarity. The amplifier circuit may also include an emitter follower stage for decreasing the source impedance of the driving circuit for the output amplifier transistors, an anti-saturation circuit for clamping the collector potential of the output transistors, and a current limit circuit for establishing a maximum current in the output transistors.

4945292, Jul 31, 1990

Aug 8, 1988

7/229539

Bruce D. Ackerson - Holladay UT
Stephen J. Paker - Bountiful UT
Clayton C. Wahlquist - West Valley City UT

Unisys Corp. - Blue Bell PA

H01J 2970

315387

The present invention provides a novel dynamic vertical height control circuit for a CRT display which is adapted to receive an input signal over a broad range of variable frequencies. The dynamic variable input frequency is applied to a free running oscillator which is coupled to a ramp generator for producing a ramp output signal. The ramp output signal is coupled back through novel feedback means comprising a comparator and means for determining the magnitude of the ramp output signal voltage for producing a feedback signal which is applied as a control signal to the ramp generator. The feedback control maintains a vertical height control signal which maintains a constant vertical display size on the CRT display.

4516118, May 7, 1985

Aug 30, 1982

6/412689

Clayton C. Wahlquist - West Valley City UT

Sperry Corporation - New York NY

G09G 128

340703

A video display terminal (VDT) is provided with a controller having six digital logic lines capable of defining sixty-four different colors. An eight color color display monitor (CDM) having three red, green and blue (RGB) video input lines is connected to a pulse width modulation converter capable of converting the sixty-four digital input conditions on the six low level voltage logic lines to sixty-four different color control conditions on the three video input lines.

4651064, Mar 17, 1987

Sep 13, 1984

6/650149

Stephen J. Parker - Bountiful UT
Clayton C. Wahlquist - West Valley City UT

Sperry Corporation - New York NY

H01J 2952

315383

A video display terminal is provided with controls which permit independent adjustment of the background information and the foreground information. Each control comprises an adjustable constant current source connected to one of two branches of a differential amplifier. One branch of the differential amplifier is employed to control the background intensity and the other branch of the differential amplifier is employed to control the foreground intensity.

4431949, Feb 14, 1984

Mar 31, 1982

6/364077

Clayton C. Wahlquist - West Valley City UT
Archie M. Barter - Beaverton OR

Tektronix, Inc. - Beaverton OR

H01J 2970, H01J 2976

315368

An improved lateral convergence deflection system for a delta-gun shadow mask color CRT includes first, second and third lateral convergence coils mounted on the CRT neck radially outward from the paths of the electron beams from the three guns. The coils are connected in series electrically, and are of suitable strength and orientation to provide a substantially unidirectional, vertical field in the path of one (e. g. , the blue) beam, and field nulls in the paths of the other two (e. g. the red and green beams). By varying the current passed through the coil by a convergence drive amplifier, the blue beam may be shifted laterally without producing any substantial movement of the other two beams.

4495519, Jan 22, 1985

Jun 30, 1982

6/393569

Clayton C. Wahlquist - West Valley City UT

Tektronix, Inc. - Beaverton OR

H04N 702

358139

A test pattern generator comprises vertical line pulse generating circuit (20) for generating a first pulse train (VL) and a second pulse train (Hi), the first pulse train being used to display vertical lines on a raster scan display apparatus and including, between successive pulses of the second pulse train, a number of pulses equal to the number of vertical lines. A horizontal sync pulse generating circuit (30) receives the second pulse train and generating a horizontal sync pulse train (M sync). A vertical blanking and sync pulse generating circuit (40, 42, 44, 46) is connected to the horizontal sync pulse generating circuit for generating a vertical sync pulse train (V sync) and a vertical blanking pulse train (Vb), and a horizontal line pulse generating circuit (50) generates a horizontal line pulse train (HL), used to display horizontal lines, in response to the horizontal sync pulse train and the vertical blanking pulse train.