DR. CHI QUYNH NGUYEN, DDS
Dentist at Berryessa Rd, San Jose, CA
License number
California 41197
Category
Dentist
Type
General Practice
Address
Address
2664 Berryessa Rd STE 103, San Jose, CA 95132
Phone
(408) 251-6559
Organization information
See more information about CHI QUYNH NGUYEN at bizstanding.comCHI QUYNH NGUYEN CORPORATION
2664 Berryessa Rd #103, San Jose, CA 95132
Registration:
Jun 17, 1997
State ID:
C2014106
Business type:
Articles of Incorporation
President:
Chi Q. Nguyen (President)
Agent:
Dunj V Nguyen,San Jose, CA 95112 (Physical)
Professional information
Senior Administrative Assistant
Position:
Senoir Administrative Assistant at Electric Power Research Institute (EPRI)
Location:
Palo Alto, California
Industry:
Research
Work:
Electric Power Research Institute (EPRI)
since Jul 2010
-
Senoir Administrative Assistant
Franklin Distillers
Jan 2010 - Jul 2010
-
COO Assistant/Production Administrator
Innovation Management Sciences
May 2008 - Oct 2009
-
Admin/Project Assistant
Phan Chiropractic
- San Jose, CA May 2007 - Nov 2007
-
Office Manager
DeVry University
- Fremont, CA May 2006 - May 2007
-
Academic/Registrar Assistant
San Jose High Academy
- San Jose, CA Feb 2005 - May 2006
-
Badminton Head Coach
Education:
DeVry University 2004 - 2008
Bachelor of Science (B.S.), Business Administration - Emphasis in Bussines Information Systems Villanova University 2013 - 2013
Certified Program, Human Resources Management
Bachelor of Science (B.S.), Business Administration - Emphasis in Bussines Information Systems Villanova University 2013 - 2013
Certified Program, Human Resources Management
Skills:
Visio, Microsoft Office, SharePoint, SAP, Oracle, HTML, E-Supply, Omega, Casper, Apollo, Window and Mac User
Honor & Awards:
Magna Cum Laude Honors Graduate
Senior Project Award for Elegance of Design
Dean’s List Honors Graduate
Badminton League Championship Player
Administrative Support Coordinator At San Jose State University
Position:
Administrative Support Coordinator at San Jose State University
Location:
San Jose, California
Industry:
Accounting
Work:
San Jose State University
- San Jose since Aug 2012
-
Administrative Support Coordinator
San Jose State University
- San Jose May 2011 - Jul 2012
-
Student Assistant
Red Ribbon Bakeshop, Inc.
- Milpitas Jan 2009 - Jul 2012
-
Customer Service
Evergreen Valley College
- San Jose Sep 2008 - May 2010
-
Student Assistant
Fry's Electronics
- Campbell Apr 2007 - Aug 2008
-
Computer Accessory Sales
Education:
San Jose State University 2010 - 2013
Bachelor of Science (BS), Corporate Financial Management Evergreen Valley College 2006 - 2010
Associate of Arts (A.A.), Business Administration
Bachelor of Science (BS), Corporate Financial Management Evergreen Valley College 2006 - 2010
Associate of Arts (A.A.), Business Administration
Skills:
Microsoft Office, Customer Service, Bilingual, Detailed Organization, Microsoft Word, Microsoft Excel, Team Leadership, Data Analysis
Interests:
Music, Investing
Languages:
English, Vietnamese
Administrative Assistant To Svp Of Engineering
Position:
Administrative Assistant to SVP of Engineering at Harmonic
Location:
San Jose, California
Industry:
Telecommunications
Work:
Harmonic
- San Jose, Ca since Nov 2012
-
Administrative Assistant to SVP of Engineering
Slice, Inc
Aug 2008 - Apr 2013
-
Customer Relations Manager and Sales Administration Manager
Bill Wilson Center
Jan 2006 - Jul 2008
-
Case Manager
Aspiranet
Feb 2006 - Jun 2008
-
Case Aide & Child Facilitator
Education:
San Jose State University 2008
Bachelor of Arts, Social Work
Bachelor of Arts, Social Work
Skills:
Social Services, Child Development, Sales, Crisis Intervention, QuickBooks, Basecamp, Salesforce.com, EDI, Customer Service, Administrative Assistants, Human Resources, PeopleSoft
Languages:
Vietnamese
Chi Nguyen - San Jose, CA
Work:
US Department of Energy
Engineer/Program Manager US Department of Energy - Washington, DC
Engineer in developmental program: The Macroflux Internal Venture, Alza Corporation - Mountain View, CA
Process Engineering Co-op Intern - Developed process technology
Engineer/Program Manager US Department of Energy - Washington, DC
Engineer in developmental program: The Macroflux Internal Venture, Alza Corporation - Mountain View, CA
Process Engineering Co-op Intern - Developed process technology
Education:
Santa Clara University
Master of Science in Mechanical Engineering UC Berkeley
Bachelor of Science in Mechanical Engineering
Master of Science in Mechanical Engineering UC Berkeley
Bachelor of Science in Mechanical Engineering
Skills:
Mechanical Design, Project Management, Program management
Chi Nguyen - San Jose, CA
Work:
eVault, A SEAGATE COMPANY
Sr. Program Manager KAISER PERMANENTE ORGANIZATION
Sr. Program Manager CISCO SYSTEMS
Solutions Program Manager CISCO SYSTEMS
CRM, Ww Advance Planning Analyst
Sr. Program Manager KAISER PERMANENTE ORGANIZATION
Sr. Program Manager CISCO SYSTEMS
Solutions Program Manager CISCO SYSTEMS
CRM, Ww Advance Planning Analyst
Chi Nguyen - San Jose, CA
Work:
CELLUTOUCH COMMUNICATIONS
TERRITORY MANAGEMENT C&Q Wireless
Owner Hestia
Clerk/ Secretary Quantum
Receptionist
TERRITORY MANAGEMENT C&Q Wireless
Owner Hestia
Clerk/ Secretary Quantum
Receptionist
Education:
San Jose State University
Business and Finance Yerba Buena High School
Business and Finance Yerba Buena High School
Chi Nguyen, San Jose CA - Teacher
Specialties:
Vietnamese
Work:
San Jose State University - San Jose CA
Dr. Chi Q Nguyen, San Jose CA - DDS (Doctor of Dental Surgery)
Specialties:
Dentistry
Address:
2664 Berryessa Rd STE 103, San Jose 95132
(408) 251-6559 (Phone)
(408) 251-6559 (Phone)
Languages:
English
Self-Verification Of Configuration Memory In Programmable Logic Devices
US Patent:
7257750, Aug 14, 2007
Filed:
Jan 13, 2005
Appl. No.:
11/036630
Inventors:
Satwant Singh - Fremont CA, US
Chi Nguyen - San Jose CA, US
Ann Wu - San Jose CA, US
Ting Yew - San Jose CA, US
Chi Nguyen - San Jose CA, US
Ann Wu - San Jose CA, US
Ting Yew - San Jose CA, US
Assignee:
Lattice Semiconductor Corporation - Hillsboro OR
International Classification:
G01R 31/28, G06F 11/00
US Classification:
714732, 714736
Abstract:
In one embodiment, a programmable logic device is provided that includes a memory having memory cells, each memory cell operable to store either a configuration bit or a RAM bit; a masking circuit operable to mask a RAM bit by providing a masking value for the masked RAM bit; an error detection circuit operable to process the configuration bits during operation of the programmable logic device using an error detection algorithm, the error detection circuit calculating a signature that includes configuration bits and masking values; and a comparator operable to compare the signature calculated by the error detection circuit with a correct signature.
Self-Verification Of Configuration Memory In Programmable Logic Devices
US Patent:
7401280, Jul 15, 2008
Filed:
May 18, 2007
Appl. No.:
11/750790
Inventors:
Satwant Singh - Fremont CA, US
Chi Nguyen - San Jose CA, US
Ann Wu - San Jose CA, US
Ting Yew - San Jose CA, US
Chi Nguyen - San Jose CA, US
Ann Wu - San Jose CA, US
Ting Yew - San Jose CA, US
Assignee:
Lattice Semiconductor Corporation - Hillsboro OR
International Classification:
G01R 31/28, G06F 11/00
US Classification:
714732, 714736
Abstract:
In one embodiment, a programmable logic device is provided that includes a memory having memory cells, each memory cell operable to store either a configuration bit or a RAM bit; a masking circuit operable to mask a RAM bit by providing a masking value for the masked RAM bit; an error detection circuit operable to process the configuration bits during operation of the programmable logic device using an error detection algorithm, the error detection circuit calculating a signature that includes configuration bits and masking values; and a comparator operable to compare the signature calculated by the error detection circuit with a correct signature.