Inventors:
Thad J. Genrich - Aurora CO
Richard M. Davis - Littleton CO
Bruno A. Martinez - Denver CO
Assignee:
Hughes Aircraft Company - Los Angeles CA
International Classification:
H04B 110
Abstract:
A high speed digital filter for use in digital interpolation and decimation provides a parallel processing implementation for integrator stages of a cascaded integrator-comb (CIC) filter. The parallel structure of the present invention is easily cascadeable since it allows subsequent integrator stages access to intermediate samples generated by preceding integrator stages. The parallel integrator structure may be implemented directly or may be reduced in complexity by removing redundant logic for use in decimator output sections or interpolator input sections. The parallel implementation of a CIC filter allows much higher sample rate filtering to be implemented with fewer standard CMOS logic devices than currently recognized implementations.