BRUCE DAVID ROSENTHAL
Pilots at Skyline Blvd, Los Gatos, CA

4922371, May 1, 1990

Nov 1, 1988

7/265572

Richard L. Gray - Cupertino CA
Raymond Chan-Man Yan - Daly City CA
Bruce Rosenthal - Los Gatos CA

Teledyne Semiconductor - Mountain View CA

H02H 904

361 91

An ESD protection circuit, suitable for use as part of an integrated circuit, limits the voltage potential at the contacts of the integrated circuit to a voltage potential difference range relative to, though extending beyond the voltage source potentials of the circuit protected. The ESD protection is effective regardless of whether the integrated circuit is powered. The ESD protection circuit includes a clamp subcircuit for limiting the voltage potential at a clamp point to a first voltage range approximately defined by the voltage source potentials and a voltage offset subcircuit, coupled between the clamp point and an integrated circuit contact, to establish a second voltage range encompassing the first voltage range. The voltage offset subcircuit conducts current between the clamp point and the contact to limit the voltage potential at the contact to the second voltage range.

6822884, Nov 23, 2004

May 22, 2003

10/444815

Bruce Rosenthal - Los Gatos CA
Richard L. Gray - Saratoga CA

Analog Microelectronics, Inc. - Santa Clara CA

H02M 318

363 59

A charge pump system and method including a charge pump and a pulse width modulated (PWM) controller are provided. The charge pump includes a pump capacitor, a reservoir capacitor, and pump circuitry. During a first phase, the pump circuit couples the pump capacitor between a first supply voltage and a second supply voltage. During a second phase, the pump circuit couples the pump capacitor and the reservoir capacitor in series between the first supply voltage and an output terminal of the charge pump system. The PWM controller, which is coupled to the pump circuitry, determines the phase of the charge pump.

4769589, Sep 6, 1988

Nov 4, 1987

7/117248

Bruce D. Rosenthal - Los Gatos CA

Teledyne Industries, Inc. - Mountain View CA

G05F 326

323313

The reference circuit includes a current mirror for providing first and second current paths for the conduction of respective first and second currents. The current mirror imposes a current level relationship between the first and second currents. A load, preferably resistive, is provided in the first current path for predominantly establishing a predetermined level of the first current. A transistor having a temperature coefficient of a predetermined polarity and a resistor having a temperature coefficient of a complimentary polarity are provided in the second current path for providing temperature compensation. Finally, a load compensation stage is provided in the first and second current paths to provide a thermal compensation feedback path from the transistor and resistor compensation elements to permit stabilization of the first current level with respect to temperature.

6958643, Oct 25, 2005

Jul 16, 2003

10/621747

Bruce Rosenthal - Los Gatos CA, US

Analog Microelectrics, Inc. - Santa Clara CA

G05F001/10, G05F003/20

327540, 327157, 330296, 323313

A bandgap reference voltage circuit can advantageously maximize performance, i. e. provide a stable output voltage as a function of input supply voltage and/or temperature. The bandgap reference voltage circuit can include a modified Brokaw cell and a cascode amplifier. The modified Brokaw cell can include two transistors, each transistor including a base, an emitter, and a collector. The collectors of the transistors can be folded into input terminals of the cascode amplifier, thereby providing an extremely compact circuit implementation. In one embodiment, the Brokaw cell can include two lateral PNP (LPNP) transistors, thereby allowing manufacturing of the bandgap reference voltage circuit with standard CMOS technology. Of importance, an output of the bandgap reference voltage circuit can provide a source voltage to the cascode amplifier, thereby ensuring a stable voltage source to the circuit.

5430670, Jul 4, 1995

Nov 8, 1993

8/148297

Bruce D. Rosenthal - Los Gatos CA

Elantec, Inc. - Milpitas CA

G11C 2700

365 45

A differential analog memory cell provides output signals governed by precisely adjustable voltage levels having minimal drift. The memory cell comprises a pair of differentially connected floating gate MOSFETs, each MOSFET having its source connected to a common current source and its drain connected to one leg of a current mirror. The floating gate of each MOSFET is connected to one electrode of a tunneling capacitor and one electrode of a coupling capacitor. Voltages applied to the other electrode of the tunneling capacitor inject charges onto the corresponding floating gate, the voltage of which is determined by the size of the coupling capacitor. Output voltages taken from the drains of the floating gate MOSFETs can be precisely adjusted up or down by applying single polarity voltage pulses to one or the other injector nodes.

2008012, Jun 5, 2008

Nov 16, 2007

11/941527

BRUCE ROSENTHAL - Los Gatos CA, US

Analog Microelectronics Inc. - Santa Clara CA

G05F 1/10, G05F 1/00

323283, 323282

The configurations of a switching regulator and the controlling methods thereof are provided. The proposed switching regulator includes a pulse-width modulation controller generating a pulse train, an output driver receiving the pulse train and generating a driving signal so as to turn an external switch on/off, and a tri-mode clock controller including a system clock generating a clock signal to control a timing of the pulse train and a tri-mode circuitry receiving a feedback signal of an output voltage across an external load and generating a control signal to control a frequency of the clock signal according to the feedback signal.

5051615, Sep 24, 1991

Jul 20, 1989

7/382847

Bruce D. Rosenthal - Los Gatos CA

Teledyne Industries - Mountain View CA

H03K 524, G01K 716

307350

A precision resistor comparator provides for the comparison and the resistive value of a first resistor with the predetermined resistive value of a second resistor. A differential comparator and level shifter provides a digital signal indicative of the relative magnitude of the first and second resistors. Another aspect of the present invention is the provision of the second resistor on a monolithic substrate with the resistor comparator circuit. The second resistor is provided with a temperature coefficient that is substantially independent of variances in its fabrication parameters and a resistance that can be trimmed, following fabrication, with substantially no effect on the temperature coefficient of the second resistor.

2005003, Feb 10, 2005

Aug 6, 2003

10/636143

Bruce Rosenthal - Los Gatos CA, US

H02H003/20

361018000

A source follower can include a primary driving device that is limited by its threshold voltage as well as a secondary driving device that is not limited by its threshold voltage, thereby allowing the secondary driving device to drive the output voltage fully to the desired voltage rail. This secondary driving device can be activated substantially at the same time the primary driving device is reaching its maximum voltage transfer, thereby ensuring a linear output voltage transfer. This source follower can be implemented in an amplifier. This amplifier, which can output true rail-to-rail voltages, can advantageously provide optimal performance, particularly in low power applications.

5867222, Feb 2, 1999

Feb 24, 1997

8/803777

Robert L. Norris - Milpitas CA
Bruce D. Rosenthal - Los Gatos CA

Elantec Semiconductor, Inc. - Milpitas CA

H04N 508

348528

A video sync slicing circuit is disclosed that employs an adjustable gain control (AGC) amplifier and circuitry that adjusts a gain of the AGC amplifier such that a blanking level of the video signal at an output of the AGC amplifier equals a blanking reference voltage. The slicing circuit includes a circuit that triggers a composite sync signal when a sync pulse of the video signal equals the fifty percent slicing level.

5341047, Aug 23, 1994

Dec 16, 1992

7/991094

Bruce D. Rosenthal - Los Gatos CA

Elantec, Inc. - Milpitas CA

H03K 190175, H03K 19003

307475

An improved voltage level shifting circuit is provided that employs a reference voltage translation circuit having its input at a fixed reference voltage, to bias the operating point of a substantially similar signal voltage circuit. The reference circuit generates a bias current in response to the reference voltage which is coupled back to buffers in the reference and signal translation circuits. The bias current maintains the operating point of the signal translation circuit close to the switching point determined by the reference voltage.