DR. BARRY M GOLDSTEIN, D.D.S.
Dentist at Greeley Ave, Chappaqua, NY

License number
New York 33766
Category
Dentist
Type
Prosthodontics
Address
Address
30 N Greeley Ave, Chappaqua, NY 10514
Phone
(914) 238-8200
(914) 238-1997 (Fax)

Organization information

See more information about BARRY M GOLDSTEIN at bizstanding.com

Barry M Goldstein DDS

30 N Greeley Ave, Chappaqua, NY 10514

Industry:
Cosmetic Dentist, Dentures, Dentists
Registration:
1980
Site:
Phone:
(914) 238-8200 (Phone)
Description:
Http://www.abgd.org/docs/verification.htm.
Barry M. Goldstein
Open Hours:
Mon-Thu 8:00 AM-5:00 PM; Fri 8:30 AM-1:00 PM; Sat 8:00 AM-2:00 PM
Features:
Emergency Service
Licensed:
Yes
Senior discount:
No

Professional information

Barry M Goldstein Photo 1

Dr. Barry M Goldstein, Chappaqua NY - DDS (Doctor of Dental Surgery)

Specialties:
Prosthodontics
Address:
30 N Greeley Ave, Chappaqua 10514
(914) 238-8200 (Phone)
Languages:
English
Education:
Medical School
New York University / College Of Dentistry
Mt Sinai Sch Of Med Mt Sinai Med Ctr


Barry M Goldstein Photo 2

Barry M Goldstein, Chappaqua NY

Specialties:
Dentist
Address:
30 N Greeley Ave, Chappaqua, NY 10514


Barry Goldstein Photo 3

Low-End High-Performance Switch Subsystem Architecture

US Patent:
4982187, Jan 1, 1991
Filed:
Nov 28, 1989
Appl. No.:
7/442286
Inventors:
Barry C. Goldstein - Chappaqua NY
Hanafy El Sayed Meleis - Yorktown Heights NY
Asser N. Tantawi - Mahopac NY
Dominick A. Zumbo - White Plains NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04Q 1104, G06F 300
US Classification:
34082579
Abstract:
An architecture for a low-end, high-performance switch subsystem allows the connection of a multitude of requests per link. The switch subsystem operates a cross-bar switch under the control of a controller, such as a personal computer, to connect selected ones of a plurality of input links to selected ones of a plurality of output links. A data structure for the switch subsystem is mapped to the memory of the controller. The switch subsystem comprises three switch servers, a request server, a connect server, and an acknowledge server, which perform in a pipelined fashion. An interface protocol for the switching subsystem may be adapted to various applications and allows a connect request to be either queued in the switch subsystem until the requested output link in available or the requestor is notified immediately if the requested output link is not available, so that alternate actions can be taken.


Barry Goldstein Photo 4

Adaptive Data Link Protocol

US Patent:
4970714, Nov 13, 1990
Filed:
Jan 5, 1989
Appl. No.:
7/294086
Inventors:
Barry C. Goldstein - Chappaqua NY
Hanafy E. Meleis - Yorktown Heights NY
Dominick A. Zumbo - Pughkeepsie NY
Assignee:
International Business Machines Corp. - Armonk NY
International Classification:
H04J 326
US Classification:
370 17
Abstract:
A communication system provides high speed transmission of data over a link, such as a fiber optic link, between a first terminal and a second terminal. The architecture and protocol permits the use of dedicated hardware such as state machines constructed of programmable array logic units, to synchronize the transmission and reception of data packets and the retransmission of designated ones of these packets in the event of a faulty transmission. Packets to be transmitted and received are stored in an array of frames in sub-windows of a memory storage window in each of the termianls, the frame number being equal to the sequence number of the data packet. By embedding sequence and status bits in each packet within control words and bits appended to each packet, the state machine in each terminal can readily track the progress of each packet so as to request acknowledgement of error-free receipt, to send an acknowledgement, to request a retransmission of a packet designated by its serial number and to distinguish a retransmitted packet from an original packet transmitted with error.


Barry Goldstein Photo 5

Bit Map Search By Competitive Processors

US Patent:
4992935, Feb 12, 1991
Filed:
Jul 12, 1988
Appl. No.:
7/218174
Inventors:
Liam D. Comerford - Carmel NY
Barry C. Goldstein - Chappaqua NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1206
US Classification:
364200
Abstract:
A method and apparatus for performing a bit map search of the allocation state of memory pages in a computing system. A competitive search is accomplished by a pair of dedicated microprocessors, each of which implements a differently optimized search procedure, to find a bit indicating an un-allocated page in the memory. The first processor to find such a bit interrupts the other processor. The first processor then calculates the free page location and informs the computing system of the location. The other processor is responsible for updating the bit map and summary buffers.