ASHISH GOEL
Pilots at Vernier Pl, Palo Alto, CA

License number
California C1063628
Issued Date
Aug 2016
Expiration Date
Aug 2018
Category
Airmen
Address
Address
1002 Vernier Pl, Palo Alto, CA 94305

Professional information

Ashish Goel Photo 1

Prioritizing Messages Within A Message Network

US Patent:
2012008, Apr 12, 2012
Filed:
Oct 6, 2010
Appl. No.:
12/898711
Inventors:
Abdur Chowdhury - San Francisco CA, US
Ashish Goel - Palo Alto CA, US
Ram Ravichandran - Mesa AZ, US
Assignee:
TWITTER, INC. - San Francisco CA
International Classification:
G06F 15/16
US Classification:
709206, 709207
Abstract:
A system and a method are disclosed for recommending electronic messages in a message sharing system. Users can post messages to the message sharing system. These messages from posting users are received by the system and sent to receiving users that have subscribed to the posting users. The receiving users interact with the messages in various ways, such as by sharing the messages with other users. Interaction information is received for each of the electronic messages. The interaction information includes an indication of the number of interactions with the electronic message by receiving users. A score is determined for each electronic message based on the interaction information. Electronic messages are selected for being recommended to a user or a group of users based on the scores. The recommendations are then sent to the users, enabling users to better focus their attention on messages that are likely to be interesting.


Ashish Goel Photo 2

Pattern Matching System And Method For Data Streams, Including Deep Packet Inspection

US Patent:
8214305, Jul 3, 2012
Filed:
Nov 24, 2008
Appl. No.:
12/313868
Inventors:
Mark Birman - Palo Alto CA, US
Andrew Rosman - Palo Alto CA, US
Pankaj Gupta - Palo Alto CA, US
Ashish Goel - Palo Alto CA, US
Assignee:
NetLogic Microsystems, Inc. - Irvine CA
International Classification:
G06F 15/18
US Classification:
706 12
Abstract:
A data stream search system can include a plurality of search data inputs logically divided into at least M+N sets. The sets have a logical order with respect to one another, each set providing more than one bit value. A key application circuit can comprise a plurality of data paths that each couple a different group of at least M data input sets to a corresponding content addressable memory (CAM) section. Each different group of at least M data input sets can be contiguous with respect to the logical order, and shifted in bit order from one another by at least two bits.