ANNE ELIZABETH MILLER, LMFT
Marriage and Family Therapists at Woodward St, Portland, OR

6719614, Apr 13, 2004

Jan 9, 2002

10/044378

Anne E. Miller - Portland OR
A. Daniel Feller - Portland OR
Kenneth C. Cadien - Portland OR

Intel Corporation - Santa Clara CA

B24B 100

451 41, 451285, 510175, 252 791

Methods for the chemical-mechanical polishing (CMP) of copper layers on integrated circuits are described, along with the chemical compositions of various pre- and post-polishing solutions. In one embodiment, a pre-polish cleaning operation with a complexing organic acid buffer system is performed prior to the CMP of the copper. In alternative embodiments, a rinse operation is performed subsequent to the cleaning operation and prior to the CMP. In further alternatives, a post-polish cleaning operation with a chelating agent is performed. In still further alternatives, the pH of a pre-polish cleaner is ramped during the pre-polish cleaning operation to match the pH of the polish slurry which is used, subsequent to the cleaning operation, to remove excess portions of the copper layer to be polished.

6719920, Apr 13, 2004

Nov 30, 2001

10/002855

Anne E. Miller - Portland OR

Intel Corporation - Santa Clara CA

C09K 1300

252 791, 252 794, 438692

A slurry is described that comprises a mixture of between about 0. 01 mole and about 0. 1 mole per liter of an organic acid salt, between about 1% to about 20% by volume of an abrasive, and an oxidizer.

7223685, May 29, 2007

Jun 23, 2003

10/602488

Tatyana N. Andryushchenko - Portland OR, US
Anne E. Miller - Portland OR, US

Intel Corporation - Santa Clara CA

H01L 21/4763, H01L 21/44, H01L 21/461, H01L 21/302

438622, 438625, 438626, 438627, 438628, 438629, 438631, 438633, 438634, 438637, 438638, 438643, 438644, 438645, 438648, 438652, 438653, 438654, 438656, 438669, 438672, 438685, 438687, 438691, 438692, 257E2101, 257E21011

The present application discloses process comprising providing a wafer, the wafer comprising an inter-layer dielectric (ILD) having a feature therein, an under-layer deposited on the ILD, and a barrier layer deposited on the under-layer, and a conductive layer deposited in the feature, placing the wafer in an electrolyte, such that at least the barrier layer is immersed in the electrolyte, and applying an electrical potential between the electrode and the wafer. Also disclosed is an apparatus comprising a vessel having an electrolyte therein, a first electrode at least partially immersed in the electrolyte, the first electrode comprising a wafer comprising an inter-layer dielectric (ILD) having a feature therein, an under-layer deposited on the ILD layer, a barrier layer deposited on the under-layer and a conductive layer deposited in the feature, a second electrode at least partially immersed in the electrolyte, and a potential source for applying a potential difference between the first and second electrodes. Other embodiments are also disclosed and claimed.

7201784, Apr 10, 2007

Jun 30, 2003

10/611233

Anne E. Miller - Portland OR, US
Charles Poutasse - Lake Oswego OR, US

Intel Corporation - Santa Clara CA

C09G 1/02, C09G 1/04, B24B 1/00

51308, 106 3, 438692, 438693

Slurries and methods for the chemical mechanical polishing of high density copper interconnects in a low k ILD are presented. In a particular embodiment of the present invention, a slurry for polishing copper is formed by combining a surfactant comprising an alkyl ethoxy organic acid such as glycolic acid ethoxylate lauryl ether (GAELE), an abrasive such as silica, an oxidizing agent such as hydrogen peroxide, and a chelating buffer system such as citric acid and potassium citrate dissolved in the mixture. This slurry provides a very low incidence of bent line defects, a low erosion rate, and a low dishing rate on a substrate comprising high density copper interconnects in a low k ILD. Embodiments of methods of the present invention use the disclosed slurries.

2003021, Nov 13, 2003

Jun 11, 2003

10/460620

Anne Miller - Portland OR, US
A. Feller - Portland OR, US
Kenneth Cadien - Portland OR, US

H01L021/302, H01L021/461

438/692000

A copper polish slurry, useful in the manufacture of integrated circuits generally, and for chemical mechanical polishing of copper and copper diffusion barriers particularly, may be formed by combining a chelating, organic acid buffer system such as citric acid and potassium citrate; and an abrasive, such as for example colloidal silica. Alternative copper polish slurries, in accordance with the present invention, may be formed by further combining an oxidizer, such as hydrogen peroxide, and/or a corrosion inhibitor such as benzotriazole. Advantageous properties of slurries in accordance with the present invention include the enhancement of Cu removal rates to 3000 angstroms per minute. This high polish rate is achieved while maintaining local pH stability and substantially reducing global and local corrosion as compared to prior art copper polish slurries. Local pH stability provides for reduced within-wafer non-uniformity and reduced corrosion defects. Furthermore, copper diffusion barriers such as tantalum or tantalum nitride may also be polished with such slurries wherein the oxidizer is not included.

2002017, Nov 28, 2002

Jul 11, 2002

10/193794

Anne Miller - Portland OR, US
A. Feller - Portland OR, US
Kenneth Cadien - Portland OR, US

H01L021/302, H01L021/461

438/689000

A copper polish slurry, useful in the manufacture of integrated circuits generally, and for chemical mechanical polishing of copper and copper diffusion barriers particularly, may be formed by combining a chelating, organic acid buffer system such as citric acid and potassium citrate; and an to abrasive, such as for example colloidal silica. Alternative copper polish slurries, in accordance with the present invention, may be formed by further combining an oxidizer, such as hydrogen peroxide, and/or a corrosion inhibitor such as benzotriazole. Advantageous properties of slurries in accordance with the present invention include the enhancement of Cu removal rates to 3000 angstroms per minute. This high polish rate is achieved while maintaining local pH stability and substantially reducing global and local corrosion as compared to prior art copper polish slurries. Local pH stability provides for reduced within-wafer non-uniformity and reduced corrosion defects. Furthermore, copper diffusion barriers such as tantalum or tantalum nitride may also be polished with such slurries wherein the oxidizer is not included.

2006013, Jun 29, 2006

Dec 29, 2004

11/026322

Harsono Simka - Saratoga CA, US
Sadasivan Shankar - Cupertino CA, US
Lei Jiang - Camas WA, US
Paul Fischer - Portland OR, US
Anne Miller - Portland OR, US
Kenneth Cadien - Portland OR, US

C09K 13/00, C03C 15/00, H01L 21/302, B44C 1/22

216088000, 438692000, 252079100, 216089000

A slurry for use in a chemical mechanical polishing process for planarizing copper-based metal structures on a substrate comprises an oxidizer, an organic complexing agent, surfactants, and a plurality of copper-based metal abrasive particles, wherein the copper in the copper-based metal is capable of dissolving into the slurry and forming copper ion complexes. During the chemical mechanical polishing process, the copper removal rate may be selectively increased by increasing the concentration of copper metal abrasive particles in the slurry, and the copper removal rate may be selectively decreased by decreasing the concentration of copper metal abrasive particles in the slurry.

6838383, Jan 4, 2005

Jul 25, 2002

10/206318

Anne E. Miller - Portland OR, US

Intel Corporation - Santa Clara CA

H01L 21302, C09K 1300, C09K 1306

438692, 252 791, 252 794

Slurries for use in the chemical mechanical polishing (CMP) of copper and copper diffusion barriers that reduce pattern sensitive erosion of an underlying dielectric layer include at least one surfactant. Inclusion of surfactants, such as cetyltrimethylammonium bromide in a slurry mixture can reduce pattern sensitive erosion of dielectric materials such as silicon oxide, and fluorinated oxides of silicon that would otherwise occur during CMP of copper and copper diffusion barriers as is typical in the formation of copper interconnect lines in integrated circuits.

2007015, Jul 5, 2007

Dec 30, 2005

11/322885

Mark Buehler - Portland OR, US
Anne Miller - Portland OR, US
Tatyana Andryushchenko - Portland OR, US

H01L 21/8242, H01L 21/461

257295000, 438585000, 438633000, 438692000, 438240000, 438591000, 438785000, 257382000

A method for reducing the dissolution of aluminum gate electrodes in a high pH clean chemistry comprises modifying the high pH clean chemistry to include a silanol-based chemical. The silanol-based chemical causes a protective layer to form on a top surface of the aluminum gate electrode. The protective layer substantially reduces or prevents corrosion that occurs due to the high pH level of the clean chemistry. The protective layer is formed by the silanol-based chemical bonding to the aluminum gate electrode through a hydrolysis reaction, thereby forming a silanol-based protective layer.

7157378, Jan 2, 2007

Jul 6, 2004

10/885958

Justin K. Brask - Portland OR, US
Chris E. Barns - Portland OR, US
Mark L. Doczy - Beaverton OR, US
Uday Shah - Portland OR, US
Jack Kavalieros - Portland OR, US
Matthew V. Metz - Hillsboro OR, US
Suman Datta - Beaverton OR, US
Anne E. Miller - Portland OR, US
Robert S. Chau - Beaverton OR, US

Intel Corporation - Santa Clara CA

H01L 21/302

438704, 257E21444, 257E21453, 257E21624, 257E21625, 257E21638, 257E21639, 257E21655, 438183, 438216, 438287, 438591, 438654, 438656, 438FOR 193

A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, forming a trench within the dielectric layer, and forming a high-k gate dielectric layer within the trench. After forming a first metal layer on the high-k gate dielectric layer, a second metal layer is formed on the first metal layer. At least part of the second metal layer is removed from above the dielectric layer using a polishing step, and additional material is removed from above the dielectric layer using an etch step.