ANDREW CHRISTOPHER WALTON
Pilots at Pebble Bch Rd, Rocklin, CA

7437651, Oct 14, 2008

Jun 29, 2004

10/879262

John A. Nerl - Londonderry NH, US
Ken Pomaranski - Roseville CA, US
Gary Gostin - Plano TX, US
Andrew Walton - Rocklin CA, US
David Soper - Murphy TX, US

Hewlett-Packard Development Company, L.P. - Houston TX

H03M 13/00, G11C 29/00

714767, 714773

A method for controlling application of an erasure mode of an error correction code (ECC) algorithm in a memory subsystem includes detecting errors in cache lines retrieved from the memory subsystem using the ECC algorithm. The method also analyzes the errors to detect a repeated bit pattern of data corruption within the cache lines, correlates the detected repeated bit pattern of data corruption to one of a plurality of domains of the memory subsystem, and applies the ECC algorithm to erase bits associated with the detected repeated bit pattern from cache lines retrieved from the correlated domain of the memory subsystem.

2007009, May 3, 2007

Oct 27, 2005

11/260993

Andrew Walton - Rocklin CA, US
Bryan Jacquot - Windsor CO, US
Steve Lyle - Granite Bay CA, US

G06K 9/36

382232000

In one embodiment, a device is provided with a non-volatile memory in which a vector image illustrating the device is stored, and an interface to provide a remote management tool with access to the vector image, to assist the tool in managing the device. The vector image has a plurality of vectors, with one or more sets of the vectors being associated with one or more handles. Each of the handles identifies a portion of the device. Methods for generating and embedding the vector image in the device, and programs that access the device and utilize the relationships between the image's handles and vectors, are also disclosed.

7313749, Dec 25, 2007

Jun 29, 2004

10/879643

John A. Nerl - Londonderry NH, US
Ken Pomaranski - Roseville CA, US
Gary Gostin - Plano TX, US
Andrew Walton - Rocklin CA, US
David Soper - Murphy TX, US

Hewlett-Packard Development Company, L.P. - Houston TX

G11C 29/00

714764

A system utilizing an erasure mode in an error correction code algorithm is described that includes non-volatile memory storing a page deallocation table. A memory controller stores and retrieves data from a memory subsystem, and uses an error correction code algorithm to correct data corruption in retrieved data. An error analysis algorithm executed in a processor records instances of data corruption in the page deallocation tables and deallocates memory regions associated with multiple occurrences of data corruption at single bit locations. The error analysis algorithm further causes the memory controller to apply an erasure mode of the error correction code algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removes entries in the page deallocation table that correspond to data corruption addressed by application of the erasure mode.

2007009, May 3, 2007

Oct 27, 2005

11/261188

Andrew Walton - Rocklin CA, US
Bryan Jacquot - Windsor CO, US
Steve Lyle - Granite Bay CA, US

G06F 3/12

358001130

In one embodiment, a device is provided with a non-volatile memory that stores a plurality of vector images illustrating different views of the device, and one or more relationships specifying how to navigate between the vector images. The device is also provided with an interface to provide access to the vector images. In another embodiment, a computer-implemented method includes: 1) retrieving at least a first image from a set of images stored in a device; 2) causing the first image to be displayed to a user; and 3) in response to the user's interaction with the first image, causing a second image retrieved from the device to be displayed to the user.

7308638, Dec 11, 2007

Jun 29, 2004

10/879255

John A. Nerl - Londonderry NH, US
Ken Pomaranski - Roseville CA, US
Gary Gostin - Plano TX, US
Andrew Walton - Rocklin CA, US
David Soper - Murphy TX, US

Hewlett-Packard Development Company, L.P. - Houston TX

G11C 29/00

714763

In one embodiment, a computer readable medium comprises code for recording occurrences of data corruption in data retrieved from a memory subsystem, code for determining whether bit locations within the memory subsystem are associated with multiple occurrences of data corruption, code for deallocating, in response to the code for determining, memory regions containing bit locations associated with multiple occurrences of data corruption, code for analyzing patterns of data corruption repeated across multiple addresses of the memory subsystem, and code for controlling application of an error correction code (ECC) algorithm by the memory subsystem to erase bits associated with a repeated bit pattern, detected by the code for analyzing, from data retrieved from the memory subsystem.

2011013, Jun 9, 2011

Dec 8, 2009

12/633648

Andrew C. WALTON - Rocklin CA, US
Jeffrey A. Barlow - Wilton Manors FL, US

G06F 11/07, G06F 11/14

714 3, 714 48, 714 2, 714E11025, 714E11113

A method of managing errors in a data processing system may involve at least one computer system. Each computer system may include a processor that executes an operating system, firmware, and system memory storing instructions for the operating system. A firmware error handler resident in the firmware may identify an error occurring in the computer system. The firmware error handler may determine whether the operating system is required to take an action in response to the error. If the operating system is not required to take an action in response to the error, the firmware error handler may create an error log accessible to the operating system appropriate to cause the operating system to take no action.

8151147, Apr 3, 2012

Dec 17, 2009

12/640971

Anurupa Rajkumari - Round Rock TX, US
Andrew C. Walton - Rocklin CA, US
Howard Calkin - Davis CA, US

Hewlett-Packard Development Company, L.P. - Houston TX

G06F 11/00

714 48, 714 2, 714 43

In accordance with at least some embodiments, a system comprises a plurality of partitions, each partition having its own error handler. The system further comprises a plurality of resources assignable to the plurality of partitions. The system further comprises management logic coupled to the plurality of partitions and the plurality of resources. The management logic comprises an error management tool that synchronizes operation of the error handlers in response to an error.

8122291, Feb 21, 2012

Jan 21, 2010

12/691512

Nehal K. Patel - Lincoln CA, US
Andrew C. Walton - Rocklin CA, US
Kenneth C. Duisenberg - Roseville CA, US

Hewlett-Packard Development Company, L.P. - Houston TX

G06F 11/00

714 31, 714 3811

Method and system of error logging. At least some of the illustrative embodiments are methods including detecting assertion of an error pin by a processor system, (comprising at least a main processor and a chipset, the assertion of the error pin an indication to reboot the processor system) the detecting by a reset circuit, notifying a management processor (distinct from the main processor) that the error pin is asserted (the notifying by the reset circuit), writing to a plurality of registers in the chipset (the writing by the management processor), de-asserting a reset pin of the main processor, and then executing by the main processor an error-handling code to generate an error log.

2007009, May 3, 2007

Oct 27, 2005

11/260967

Andrew Walton - Rocklin CA, US
Bryan Jacquot - Windsor CO, US

G06F 3/12

358001130, 358001150

In one embodiment, an image formatting utility is embodied in code, stored and executed apart from any device that it retrieves images from, that, in response to receiving an image request from a device management tool: 1) retrieves an image from a device that is a target of the image request, the image illustrating at least a portion of the device; 2) retrieves component presence and status information for the device; 3) formats the image in response to the component presence and status information; and 4) returns the formatted image to the device management tool. Other embodiments are also disclosed.

8122290, Feb 21, 2012

Dec 17, 2009

12/641103

Andrew C. Walton - Rocklin CA, US
Howard Calkin - Davis CA, US
Anurupa Rajkumari - Round Rock TX, US

Hewlett-Packard Development Company, L.P. - Houston TX

G06F 11/00

714 26, 714 48

A system for error log consolidation is disclosed herein. A server computer includes a plurality of system processors and error log consolidation logic. The system processors are configurable to form isolated execution partitions. The error log consolidation logic is configured to, based on detection of a fault in the server, retrieve error logs from the system processors, and to consolidate the retrieved logs with server computer information not available to the system processors to generate a consolidated error log. The consolidated error log includes a comprehensive set of server information relevant to identifying a cause of the detected fault.