ALBERT AUGUSTUS BURK, JR
Pilots at Marigold Ct, Chapel Hill, NC
License number
North Carolina A2285170
Issued Date
Apr 2015
Expiration Date
Apr 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
105 Marigold Ct, Chapel Hill, NC 27516
Professional information
Thick Nitride Semiconductor Structures With Interlayer Structures And Methods Of Fabricating Thick Nitride Semiconductor Structures
US Patent:
2008021, Sep 11, 2008
Filed:
Mar 9, 2007
Appl. No.:
11/716319
Inventors:
Adam William Saxler - Durham NC, US
Albert Augustus Burk - Chapel Hill NC, US
Albert Augustus Burk - Chapel Hill NC, US
International Classification:
H01L 33/00
US Classification:
257101
Abstract:
A semiconductor structure includes a substrate, a nucleation layer on the substrate, a compositionally graded layer on the nucleation layer, and a layer of a nitride semiconductor material on the compositionally graded layer. The layer of nitride semiconductor material includes a plurality of substantially relaxed nitride interlayers spaced apart within the layer of nitride semiconductor material. The substantially relaxed nitride interlayers include aluminum and gallium and are conductively doped with an n-type dopant, and the layer of nitride semiconductor material including the plurality of nitride interlayers has a total thickness of at least about 2.0 μm.
Nitride Semiconductor Structures With Interlayer Structures And Methods Of Fabricating Nitride Semiconductor Structures With Interlayer Structures
US Patent:
2008022, Sep 11, 2008
Filed:
Mar 9, 2007
Appl. No.:
11/716317
Inventors:
Adam William Saxler - Durham NC, US
Albert Augustus Burk - Chapel Hill NC, US
Albert Augustus Burk - Chapel Hill NC, US
International Classification:
H01L 21/00, H01L 33/00
US Classification:
438 47, 438 46, 257 94
Abstract:
A semiconductor structure includes a first layer of a nitride semiconductor material, a substantially unstrained nitride interlayer on the first layer of nitride semiconductor material, and a second layer of a nitride semiconductor material on the nitride interlayer. The nitride interlayer has a first lattice constant and may include aluminum and gallium and may be conductively doped with an n-type dopant. The first layer and the second layer together have a thickness of at least about 0.5 μm. The nitride semiconductor material may have a second lattice constant, such that the first layer may be more tensile strained on one side of the nitride interlayer than the second layer may be on the other side of the nitride interlayer.
Minimizing Degradation Of Sic Bipolar Semiconductor Devices
US Patent:
2005011, Jun 2, 2005
Filed:
Dec 22, 2004
Appl. No.:
11/022544
Inventors:
Joseph Sumakeris - Apex NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
International Classification:
H01L029/15, H01L021/00
US Classification:
438105000, 257077000, 438931000
Abstract:
A method of forming a bipolar device includes forming at least one p-type layer of single crystal silicon carbide and at least one n-type layer of single crystal silicon carbide on a substrate. Stacking faults that grow under forward operation of the device are segregated from at least one of the interfaces between the active region and the remainder of the device. The method of forming bipolar devices includes growing at least one of the epitaxial layers to a thickness greater than the minority carrier diffusion length in that layer. The method also increases the doping concentration of epitaxial layers surrounding the drift region to decrease minority carrier lifetimes therein.
Minimizing Degradation Of Sic Bipolar Semiconductor Devices
US Patent:
2007011, May 24, 2007
Filed:
Nov 16, 2006
Appl. No.:
11/560575
Inventors:
Joseph Sumakeris - Apex NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
Assignee:
Cree, Inc. - Durham NC
International Classification:
C30B 29/36, H01L 21/331
US Classification:
438369000, 117951000, 438372000
Abstract:
A method of forming a bipolar device includes forming at least one p-type layer of single crystal silicon carbide and at least one n-type layer of single crystal silicon carbide on a substrate. Stacking faults that grow under forward operation of the device are segregated from at least one of the interfaces between the active region and the remainder of the device. The method of forming bipolar devices includes growing at least one of the epitaxial layers to a thickness greater than the minority carrier diffusion length in that layer. The method also increases the doping concentration of epitaxial layers surrounding the drift region to decrease minority carrier lifetimes therein.
Minimizing Degradation Of Sic Bipolar Semiconductor Devices
US Patent:
2003008, May 1, 2003
Filed:
Oct 26, 2001
Appl. No.:
10/046346
Inventors:
Joseph Sumakeris - Apex NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
International Classification:
H01F021/04
US Classification:
336/077000, 257/077000
Abstract:
A bipolar device has at least one p-type layer of single crystal silicon carbide and at least one n-type layer of single crystal silicon carbide, wherein those portions of those stacking faults that grow under forward operation are segregated from at least one of the interfaces between the active region and the remainder of the device.
Minimizing Degradation Of Sic Bipolar Semiconductor Devices
US Patent:
2005011, Jun 2, 2005
Filed:
Dec 22, 2004
Appl. No.:
11/022520
Inventors:
Joseph Sumakeris - Apex NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
Ranbir Singh - Apex NC, US
Michael Paisley - Garner NC, US
Stephan Mueller - Durham NC, US
Hudson Hobgood - Pittsboro NC, US
Calvin Carter - Cary NC, US
Albert Burk - Chapel Hill NC, US
International Classification:
H01L029/15
US Classification:
257077000
Abstract:
A bipolar device has at least one p−type layer of single crystal silicon carbide and at least one n−type layer of single crystal silicon carbide, wherein those portions of those stacking faults that grow under forward operation are segregated from at least one of the interfaces between the active region and the remainder of the device.
Stable Power Devices On Low-Angle Off-Cut Silicon Carbide Crystals
US Patent:
2010013, Jun 3, 2010
Filed:
Nov 20, 2009
Appl. No.:
12/622861
Inventors:
Qingchun Zhang - Cary NC, US
Anant Agarwal - Chapel Hill NC, US
Doyle Craig Capell - Durham NC, US
Albert Burk - Chapel Hill NC, US
Joseph Sumakeris - Cary NC, US
Michael O'Loughlin - Chapel Hill NC, US
Anant Agarwal - Chapel Hill NC, US
Doyle Craig Capell - Durham NC, US
Albert Burk - Chapel Hill NC, US
Joseph Sumakeris - Cary NC, US
Michael O'Loughlin - Chapel Hill NC, US
International Classification:
H01L 29/24, H01L 21/04
US Classification:
257 77, 438478, 257E29104, 257E21065
Abstract:
A silicon carbide-based power device includes a silicon carbide drift layer having a planar surface that forms an off-axis angle with a direction of less than 8°.