DR. ALAN S. WONG, M.D.
Osteopathic Medicine at Cox Ave, Saratoga, CA
License number
California G58670
Category
Osteopathic Medicine
Type
Internal Medicine
Address
Address
2
18988 Cox Ave SUITE C, Saratoga, CA 95070
1418 Royal Ann Ct, San Jose, CA 95129
1418 Royal Ann Ct, San Jose, CA 95129
Phone
(408) 996-7336
(408) 996-7380 (Fax)
(408) 257-7528
(408) 996-7380 (Fax)
(408) 257-7528
Organization information
See more information about ALAN S. WONG at bizstanding.comAlan S Wong MD
18988 Cox Ave, Saratoga, CA 95070
Industry:
Marketing and Advertising, Medical Doctor's Office
Site:
Description:
Alan S Wong MD is a Marketing and Advertising company located in 18988 Cox Ave, Saratoga, California, United States.
Managers:
Alan S. Wong (Medical Doctor, Owner),Cheri Wakefield Manager, inactive
Professional information
Broker Associate At Alain Pinel Realtors
Position:
Broker Associate at Alain Pinel Realtors
Location:
San Francisco Bay Area
Industry:
Real Estate
Work:
Alain Pinel Realtors
- 3701 Buchanan Street, San Francisco, CA 94123 since Apr 2009
-
Broker Associate
Magma Design Automation
- San Jose, CA Sep 2005 - Apr 2007
-
Sr. Account Manager
Cadence Design Systems
- San Jose Jan 1996 - Jun 2004
-
Sr. Account Manager
IBM
Sep 1982 - Sep 1995
-
Engineer/Scientist
Education:
University of California, Berkeley 1977 - 1982
MS, Electrical Engineer & Computer Science University of Colorado at Boulder 1971 - 1976
BS, Electrical Engineer
MS, Electrical Engineer & Computer Science University of Colorado at Boulder 1971 - 1976
BS, Electrical Engineer
Dr. Alan S Wong - MD (Doctor of Medicine)
Hospitals:
ALAN S WONG MD
18988 Cox Ave STE C, Saratoga 95070
ALAN S WONG MD
18988 Cox Ave STE C, Saratoga 95070
18988 Cox Ave STE C, Saratoga 95070
ALAN S WONG MD
18988 Cox Ave STE C, Saratoga 95070
Education:
Medical Schools
Albert Einstein College of Medicine of Yeshiva University
Graduated: 1985
Albert Einstein College of Medicine of Yeshiva University
Graduated: 1985
Enhanced Uniqueness For Pattern Recognition
US Patent:
7211449, May 1, 2007
Filed:
Oct 29, 2003
Appl. No.:
10/697825
Inventors:
Gary Cao - Santa Clara CA, US
Alan Wong - San Jose CA, US
Alan Wong - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/66
US Classification:
438 14
Abstract:
The present invention describes a test structure with a first set of features which is a subset of product features; and a second set of features adjacent to the first set of features, the second set occupying a smaller area than the first set and the second set being similar to the first set yet being distinguishable from surrounding structures.
Enhanced Uniqueness For Pattern Recognition
US Patent:
2002008, Jul 4, 2002
Filed:
Dec 30, 2000
Appl. No.:
09/752359
Inventors:
Gary Cao - Santa Clara CA, US
Alan Wong - San Jose CA, US
Alan Wong - San Jose CA, US
International Classification:
G06K009/62
US Classification:
382/209000
Abstract:
The present invention describes a test structure with a first set of features which is a subset of product features; and a second set of features adjacent to the first set of features, the second set occupying a smaller area than the first set and the second set being similar to the first set yet being distinguishable from surrounding structures.
Method Of Determining Post-Etch Offset In Exposed-To-Embedded Overlay
US Patent:
6784004, Aug 31, 2004
Filed:
Sep 11, 2003
Appl. No.:
10/662021
Inventors:
Alan Wong - San Jose CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 2166
US Classification:
438 14
Abstract:
The present invention describes a structure for and a method of forming a first set and a second set of features in a substrate; covering the first and second set of features with a material; forming a third set of features in the material and removing the material to expose the first set of features, leaving the second set of features embedded below the material; measuring post-etch overlay between the first set and the third set of features; and measuring post-develop overlay between the second set and the third set of features.
Device Having Etched Feature With Shrinkage Carryover
US Patent:
7829852, Nov 9, 2010
Filed:
Sep 28, 2007
Appl. No.:
11/864761
Inventors:
Gary X. Cao - Santa Clara CA, US
George Chen - Los Gatos CA, US
Brandon L. Ward - San Jose CA, US
Nancy J. Wheeler - Mountain View CA, US
Alan Wong - San Jose CA, US
George Chen - Los Gatos CA, US
Brandon L. Ward - San Jose CA, US
Nancy J. Wheeler - Mountain View CA, US
Alan Wong - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01N 23/00, G01B 11/02, H01L 21/00, H01L 21/306, C09K 13/00
US Classification:
250306, 250 4922, 2504923, 356635, 356636, 438 8, 252 791, 15634515, 15634524
Abstract:
In an embodiment of the present invention, a device includes a first etched feature located in a critical dimension scanning electron microscope (CD-SEM) characterization location, the first etched feature having an upper section, a middle section, and a lower section wherein the middle section is severely shrunk relative to a corresponding middle section of a second etched feature having similar dimensions and composition that is not located in a CD-SEM characterization location. In another embodiment of the present invention, the middle section of the first etched feature has a shrinkage carryover exceeding a threshold. In still another embodiment of the present invention, the middle section of the first etched feature exhibits a line edge roughness.
Characterizing Resist Line Shrinkage Due To Cd-Sem Inspection
US Patent:
7285781, Oct 23, 2007
Filed:
Jul 7, 2004
Appl. No.:
10/886387
Inventors:
Gary X. Cao - Santa Clara CA, US
George Chen - Los Gatos CA, US
Brandon L. Ward - San Jose CA, US
Nancy J. Wheeler - Mountain View CA, US
Alan Wong - San Jose CA, US
George Chen - Los Gatos CA, US
Brandon L. Ward - San Jose CA, US
Nancy J. Wheeler - Mountain View CA, US
Alan Wong - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01N 23/00, G03F 7/20, G03F 7/00, G03F 7/40
US Classification:
250311, 250306, 250307, 250310, 25049222, 2504923, 430310, 430313, 430314, 430317, 430323, 356634, 356635, 356636, 438 8, 438 16, 438584
Abstract:
A CD-SEM (critical dimension-scanning electron microscope) system may utilize a technique for characterizing and reducing shrinkage carryover due to CD-SEM measurements. The system may identify the affects of CD-SEM measurements on the resist and adjust the operating parameters for a particular resist to avoid or significantly reduce shrinkage carryover. In this manner, the system may obtain more reliable CD measurements and avoid damage to the measured feature.
Optical Metrology Target Design For Simultaneous Measurement Of Multiple Periodic Structures
US Patent:
2005017, Aug 11, 2005
Filed:
Mar 2, 2005
Appl. No.:
11/071800
Inventors:
Alan Wong - San Jose CA, US
Gary Cao - Santa Clara CA, US
Rex Eiserer - Los Altos Hills CA, US
Gary Cao - Santa Clara CA, US
Rex Eiserer - Los Altos Hills CA, US
International Classification:
G01N023/00
US Classification:
250311000
Abstract:
An optical metrology target is provided and has a first periodic structure and a second periodic structure. The first periodic structure has at least two features and a first pitch, and the second periodic structure has at least two features and a second pitch. The optical metrology target is illuminated with a light source, and an optical signal from the optical metrology target is received and analyzed.
Optimization Of Sample Plan For Overlay
US Patent:
7197722, Mar 27, 2007
Filed:
Sep 30, 2004
Appl. No.:
10/956608
Inventors:
Alan Wong - San Jose CA, US
Jeff Drautz - Rio Rancho NM, US
Joseph D. Shindler - Gaston OR, US
Max Lau - San Ramon CA, US
George Chen - Los Gatos CA, US
Jeff Drautz - Rio Rancho NM, US
Joseph D. Shindler - Gaston OR, US
Max Lau - San Ramon CA, US
George Chen - Los Gatos CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 17/50
US Classification:
716 2, 716 19, 716 20, 716 21, 703 14
Abstract:
The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay comprising components; and establishing efficient model of overlay from the initial model of overlay including: constructing matrices; identifying redundant components and eliminating the redundant components; and identifying highly-correlated components and determining whether to eliminate the highly-correlated components.
Optical Metrology Target Design For Simultaneous Measurement Of Multiple Periodic Structures
US Patent:
2003016, Aug 28, 2003
Filed:
Feb 25, 2002
Appl. No.:
10/083877
Inventors:
Alan Wong - San Jose CA, US
Gary Cao - Santa Clara CA, US
Rex Eiserer - Los Altos CA, US
Gary Cao - Santa Clara CA, US
Rex Eiserer - Los Altos CA, US
International Classification:
H01J003/14
US Classification:
250/23700R
Abstract:
An optical metrology target is provided and has a first periodic structure and a second periodic structure. The first periodic structure has at least two features and a first pitch, and the second periodic structure has at least two features and a second pitch. The optical metrology target is illuminated with a light source, and an optical signal from the optical metrology target is received and analyzed.